eive/eive-obsw
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Merge remote-tracking branch 'origin/develop' into mueller/pus-15-tm-storage
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This commit is contained in:
Robin Müller
2022-11-11 11:26:57 +01:00
parent 31093c0d13 ceba3b9dca
commit 08c225a633
165 changed files with 2945 additions and 1393 deletions
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2
linux/CMakeLists.txt
View File

@ -4,6 +4,6 @@ add_subdirectory(callbacks)
add_subdirectory(boardtest)
add_subdirectory(devices)
add_subdirectory(fsfwconfig)
add_subdirectory(obc)
add_subdirectory(ipcore)
target_sources(${OBSW_NAME} PUBLIC ObjectFactory.cpp InitMission.cpp)

18
linux/InitMission.cpp
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@ -45,3 +45,21 @@ void scheduling::schedulingScex(TaskFactory& factory, PeriodicTaskIF*& scexDevHa
printAddObjectError("SCEX_UART_READER", objects::SCEX_UART_READER);
}
}
void scheduling::addMpsocSupvHandlers(PeriodicTaskIF* plTask) {
#if OBSW_ADD_PLOC_SUPERVISOR == 1
plTask->addComponent(objects::PLOC_SUPERVISOR_HANDLER, DeviceHandlerIF::PERFORM_OPERATION);
plTask->addComponent(objects::PLOC_SUPERVISOR_HANDLER, DeviceHandlerIF::SEND_READ);
plTask->addComponent(objects::PLOC_SUPERVISOR_HANDLER, DeviceHandlerIF::GET_READ);
plTask->addComponent(objects::PLOC_SUPERVISOR_HANDLER, DeviceHandlerIF::SEND_WRITE);
plTask->addComponent(objects::PLOC_SUPERVISOR_HANDLER, DeviceHandlerIF::GET_WRITE);
#endif
#if OBSW_ADD_PLOC_MPSOC == 1
plTask->addComponent(objects::PLOC_MPSOC_HANDLER, DeviceHandlerIF::PERFORM_OPERATION);
plTask->addComponent(objects::PLOC_MPSOC_HANDLER, DeviceHandlerIF::SEND_READ);
plTask->addComponent(objects::PLOC_MPSOC_HANDLER, DeviceHandlerIF::GET_READ);
plTask->addComponent(objects::PLOC_MPSOC_HANDLER, DeviceHandlerIF::SEND_WRITE);
plTask->addComponent(objects::PLOC_MPSOC_HANDLER, DeviceHandlerIF::GET_WRITE);
#endif
}

4
linux/InitMission.h
View File

@ -4,4 +4,6 @@
namespace scheduling {
void schedulingScex(TaskFactory& factory, PeriodicTaskIF*& scexDevHandler,
PeriodicTaskIF*& scexReaderTask);
}
void addMpsocSupvHandlers(PeriodicTaskIF* task);
} // namespace scheduling

81
linux/ObjectFactory.cpp
View File

@ -1,12 +1,13 @@
#include "ObjectFactory.h"
#include <fsfw/power/PowerSwitchIF.h>
#include <fsfw/subsystem/Subsystem.h>
#include <fsfw_hal/common/gpio/GpioCookie.h>
#include <fsfw_hal/common/gpio/GpioIF.h>
#include <fsfw_hal/common/gpio/gpioDefinitions.h>
#include <fsfw_hal/linux/serial/SerialCookie.h>
#include <fsfw_hal/linux/spi/SpiComIF.h>
#include <fsfw_hal/linux/spi/SpiCookie.h>
#include <fsfw_hal/linux/uart/UartCookie.h>
#include <linux/callbacks/gpioCallbacks.h>
#include <linux/devices/Max31865RtdLowlevelHandler.h>
#include <mission/controller/AcsController.h>
@ -15,8 +16,6 @@
#include <mission/devices/Max31865PT1000Handler.h>
#include <mission/devices/ScexDeviceHandler.h>
#include <mission/devices/SusHandler.h>
#include <mission/system/SusAssembly.h>
#include <mission/system/TcsBoardAssembly.h>
#include <mission/system/fdir/RtdFdir.h>
#include <mission/system/fdir/SusFdir.h>
@ -24,6 +23,11 @@
#include "devConf.h"
#include "devices/addresses.h"
#include "devices/gpioIds.h"
#include "eive/definitions.h"
#include "mission/system/objects/SusAssembly.h"
#include "mission/system/objects/TcsBoardAssembly.h"
#include "mission/system/tree/acsModeTree.h"
#include "mission/system/tree/payloadModeTree.h"
void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiComIF,
PowerSwitchIF* pwrSwitcher, std::string spiDev) {
@ -78,7 +82,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[0] =
new SusHandler(objects::SUS_0_N_LOC_XFYFZM_PT_XF, 0, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_0_N_LOC_XFYFZM_PT_XF);
susHandlers[0]->setParent(objects::SUS_BOARD_ASS);
susHandlers[0]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_1, gpioIds::CS_SUS_1, SUS::MAX_CMD_SIZE,
@ -86,7 +89,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[1] =
new SusHandler(objects::SUS_1_N_LOC_XBYFZM_PT_XB, 1, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_1_N_LOC_XBYFZM_PT_XB);
susHandlers[1]->setParent(objects::SUS_BOARD_ASS);
susHandlers[1]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_2, gpioIds::CS_SUS_2, SUS::MAX_CMD_SIZE,
@ -94,7 +96,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[2] =
new SusHandler(objects::SUS_2_N_LOC_XFYBZB_PT_YB, 2, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_2_N_LOC_XFYBZB_PT_YB);
susHandlers[2]->setParent(objects::SUS_BOARD_ASS);
susHandlers[2]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_3, gpioIds::CS_SUS_3, SUS::MAX_CMD_SIZE,
@ -102,7 +103,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[3] =
new SusHandler(objects::SUS_3_N_LOC_XFYBZF_PT_YF, 3, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_3_N_LOC_XFYBZF_PT_YF);
susHandlers[3]->setParent(objects::SUS_BOARD_ASS);
susHandlers[3]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_4, gpioIds::CS_SUS_4, SUS::MAX_CMD_SIZE,
@ -110,7 +110,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[4] =
new SusHandler(objects::SUS_4_N_LOC_XMYFZF_PT_ZF, 4, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_4_N_LOC_XMYFZF_PT_ZF);
susHandlers[4]->setParent(objects::SUS_BOARD_ASS);
susHandlers[4]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_5, gpioIds::CS_SUS_5, SUS::MAX_CMD_SIZE,
@ -118,7 +117,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[5] =
new SusHandler(objects::SUS_5_N_LOC_XFYMZB_PT_ZB, 5, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_5_N_LOC_XFYMZB_PT_ZB);
susHandlers[5]->setParent(objects::SUS_BOARD_ASS);
susHandlers[5]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_6, gpioIds::CS_SUS_6, SUS::MAX_CMD_SIZE,
@ -126,7 +124,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[6] =
new SusHandler(objects::SUS_6_R_LOC_XFYBZM_PT_XF, 6, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_6_R_LOC_XFYBZM_PT_XF);
susHandlers[6]->setParent(objects::SUS_BOARD_ASS);
susHandlers[6]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_7, gpioIds::CS_SUS_7, SUS::MAX_CMD_SIZE,
@ -134,7 +131,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[7] =
new SusHandler(objects::SUS_7_R_LOC_XBYBZM_PT_XB, 7, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_7_R_LOC_XBYBZM_PT_XB);
susHandlers[7]->setParent(objects::SUS_BOARD_ASS);
susHandlers[7]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_8, gpioIds::CS_SUS_8, SUS::MAX_CMD_SIZE,
@ -142,7 +138,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[8] =
new SusHandler(objects::SUS_8_R_LOC_XBYBZB_PT_YB, 8, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_8_R_LOC_XBYBZB_PT_YB);
susHandlers[8]->setParent(objects::SUS_BOARD_ASS);
susHandlers[8]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_9, gpioIds::CS_SUS_9, SUS::MAX_CMD_SIZE,
@ -150,7 +145,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[9] =
new SusHandler(objects::SUS_9_R_LOC_XBYBZB_PT_YF, 9, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_9_R_LOC_XBYBZB_PT_YF);
susHandlers[9]->setParent(objects::SUS_BOARD_ASS);
susHandlers[9]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_10, gpioIds::CS_SUS_10, SUS::MAX_CMD_SIZE,
@ -158,7 +152,6 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[10] =
new SusHandler(objects::SUS_10_N_LOC_XMYBZF_PT_ZF, 10, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_10_N_LOC_XMYBZF_PT_ZF);
susHandlers[10]->setParent(objects::SUS_BOARD_ASS);
susHandlers[10]->setCustomFdir(fdir);
spiCookie = new SpiCookie(addresses::SUS_11, gpioIds::CS_SUS_11, SUS::MAX_CMD_SIZE,
@ -166,11 +159,24 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
susHandlers[11] =
new SusHandler(objects::SUS_11_R_LOC_XBYMZB_PT_ZB, 11, objects::SPI_MAIN_COM_IF, spiCookie);
fdir = new SusFdir(objects::SUS_11_R_LOC_XBYMZB_PT_ZB);
susHandlers[11]->setParent(objects::SUS_BOARD_ASS);
susHandlers[11]->setCustomFdir(fdir);
std::array<object_id_t, 12> susIds = {
objects::SUS_0_N_LOC_XFYFZM_PT_XF, objects::SUS_1_N_LOC_XBYFZM_PT_XB,
objects::SUS_2_N_LOC_XFYBZB_PT_YB, objects::SUS_3_N_LOC_XFYBZF_PT_YF,
objects::SUS_4_N_LOC_XMYFZF_PT_ZF, objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
objects::SUS_6_R_LOC_XFYBZM_PT_XF, objects::SUS_7_R_LOC_XBYBZM_PT_XB,
objects::SUS_8_R_LOC_XBYBZB_PT_YB, objects::SUS_9_R_LOC_XBYBZB_PT_YF,
objects::SUS_10_N_LOC_XMYBZF_PT_ZF, objects::SUS_11_R_LOC_XBYMZB_PT_ZB};
SusAssHelper susAssHelper = SusAssHelper(susIds);
auto susAss = new SusAssembly(objects::SUS_BOARD_ASS, pwrSwitcher, susAssHelper);
for (auto& sus : susHandlers) {
if (sus != nullptr) {
ReturnValue_t result = sus->connectModeTreeParent(*susAss);
if (result != returnvalue::OK) {
sif::error << "Connecting SUS " << sus->getObjectId() << " to SUS assembly failed"
<< std::endl;
}
#if OBSW_TEST_SUS == 1
sus->setStartUpImmediately();
sus->setToGoToNormalMode(true);
@ -180,17 +186,7 @@ void ObjectFactory::createSunSensorComponents(GpioIF* gpioComIF, SpiComIF* spiCo
#endif
}
}
std::array<object_id_t, 12> susIds = {
objects::SUS_0_N_LOC_XFYFZM_PT_XF, objects::SUS_1_N_LOC_XBYFZM_PT_XB,
objects::SUS_2_N_LOC_XFYBZB_PT_YB, objects::SUS_3_N_LOC_XFYBZF_PT_YF,
objects::SUS_4_N_LOC_XMYFZF_PT_ZF, objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
objects::SUS_6_R_LOC_XFYBZM_PT_XF, objects::SUS_7_R_LOC_XBYBZM_PT_XB,
objects::SUS_8_R_LOC_XBYBZB_PT_YB, objects::SUS_9_R_LOC_XBYBZB_PT_YF,
objects::SUS_10_N_LOC_XMYBZF_PT_ZF, objects::SUS_11_R_LOC_XBYMZB_PT_ZB};
SusAssHelper susAssHelper = SusAssHelper(susIds);
auto susAss =
new SusAssembly(objects::SUS_BOARD_ASS, objects::NO_OBJECT, pwrSwitcher, susAssHelper);
static_cast<void>(susAss);
susAss->connectModeTreeParent(satsystem::acs::ACS_SUBSYSTEM);
#endif /* OBSW_ADD_SUN_SENSORS == 1 */
}
@ -292,6 +288,11 @@ void ObjectFactory::createRtdComponents(std::string spiDev, GpioIF* gpioComIF,
std::array<SpiCookie*, NUM_RTDS> rtdCookies = {};
std::array<Max31865EiveHandler*, NUM_RTDS> rtds = {};
RtdFdir* rtdFdir = nullptr;
TcsBoardHelper helper(rtdInfos);
TcsBoardAssembly* tcsBoardAss = new TcsBoardAssembly(
objects::TCS_BOARD_ASS, pwrSwitcher, pcdu::Switches::PDU1_CH0_TCS_BOARD_3V3, helper);
static_cast<void>(tcsBoardAss);
// Create special low level reader communication interface
new Max31865RtdReader(objects::SPI_RTD_COM_IF, comIF, gpioComIF);
for (uint8_t idx = 0; idx < NUM_RTDS; idx++) {
@ -303,7 +304,11 @@ void ObjectFactory::createRtdComponents(std::string spiDev, GpioIF* gpioComIF,
rtds[idx] =
new Max31865EiveHandler(rtdInfos[idx].first, objects::SPI_RTD_COM_IF, rtdLowLevelCookie);
rtds[idx]->setDeviceInfo(idx, rtdInfos[idx].second);
rtds[idx]->setParent(objects::TCS_BOARD_ASS);
ReturnValue_t result = rtds[idx]->connectModeTreeParent(*tcsBoardAss);
if (result != returnvalue::OK) {
sif::error << "Connecting RTD " << static_cast<int>(idx) << " to RTD Assembly failed"
<< std::endl;
}
rtdFdir = new RtdFdir(rtdInfos[idx].first);
rtds[idx]->setCustomFdir(rtdFdir);
#if OBSW_DEBUG_RTD == 1
@ -315,11 +320,6 @@ void ObjectFactory::createRtdComponents(std::string spiDev, GpioIF* gpioComIF,
#endif
}
TcsBoardHelper helper(rtdInfos);
TcsBoardAssembly* tcsBoardAss =
new TcsBoardAssembly(objects::TCS_BOARD_ASS, objects::NO_OBJECT, pwrSwitcher,
pcdu::Switches::PDU1_CH0_TCS_BOARD_3V3, helper);
static_cast<void>(tcsBoardAss);
#endif // OBSW_ADD_RTD_DEVICES == 1
}
@ -337,16 +337,29 @@ void ObjectFactory::createScexComponents(std::string uartDev, PowerSwitchIF* pwr
if (switchId) {
scexHandler->setPowerSwitcher(*pwrSwitcher, switchId.value());
}
scexHandler->connectModeTreeParent(satsystem::pl::SUBSYSTEM);
}
void ObjectFactory::createThermalController() {
new ThermalController(objects::THERMAL_CONTROLLER, objects::NO_OBJECT);
new ThermalController(objects::THERMAL_CONTROLLER);
}
void ObjectFactory::createAcsController() { new AcsController(objects::ACS_CONTROLLER); }
AcsController* ObjectFactory::createAcsController(bool connectSubsystem) {
auto acsCtrl = new AcsController(objects::ACS_CONTROLLER);
if (connectSubsystem) {
acsCtrl->connectModeTreeParent(satsystem::acs::ACS_SUBSYSTEM);
}
return acsCtrl;
}
void ObjectFactory::gpioChecker(ReturnValue_t result, std::string output) {
if (result != returnvalue::OK) {
sif::error << "ObjectFactory: Adding GPIOs failed for " << output << std::endl;
}
}
void ObjectFactory::addTmtcIpCoresToFunnels(CcsdsIpCoreHandler& ipCoreHandler,
PusTmFunnel& pusFunnel, CfdpTmFunnel& cfdpFunnel) {
cfdpFunnel.addDestination(ipCoreHandler, config::LIVE_TM);
pusFunnel.addDestination(ipCoreHandler, config::LIVE_TM);
}

9
linux/ObjectFactory.h
View File

@ -4,6 +4,9 @@
#include <fsfw/returnvalues/returnvalue.h>
#include <fsfw_hal/linux/gpio/LinuxLibgpioIF.h>
#include <mission/memory/SdCardMountedIF.h>
#include <mission/tmtc/CcsdsIpCoreHandler.h>
#include <mission/tmtc/CfdpTmFunnel.h>
#include <mission/tmtc/PusTmFunnel.h>
#include <optional>
#include <string>
@ -11,6 +14,7 @@
class GpioIF;
class SpiComIF;
class PowerSwitchIF;
class AcsController;
namespace ObjectFactory {
@ -26,6 +30,9 @@ void createScexComponents(std::string uartDev, PowerSwitchIF* pwrSwitcher,
void gpioChecker(ReturnValue_t result, std::string output);
void createThermalController();
void createAcsController();
AcsController* createAcsController(bool connectSubsystem);
void addTmtcIpCoresToFunnels(CcsdsIpCoreHandler& ipCoreHandler, PusTmFunnel& pusFunnel,
CfdpTmFunnel& cfdpFunnel);
} // namespace ObjectFactory

2
linux/boardtest/UartTestClass.cpp
View File

@ -3,7 +3,7 @@
#include <errno.h> // Error integer and strerror() function
#include <fcntl.h> // Contains file controls like O_RDWR
#include <fsfw/tasks/TaskFactory.h>
#include <fsfw_hal/linux/uart/UartCookie.h>
#include <fsfw_hal/linux/serial/SerialCookie.h>
#include <linux/devices/ScexDleParser.h>
#include <linux/devices/ScexHelper.h>
#include <linux/devices/ScexUartReader.h>

2
linux/boardtest/UartTestClass.h
View File

@ -5,7 +5,7 @@
#include <fsfw/globalfunctions/DleEncoder.h>
#include <fsfw/globalfunctions/DleParser.h>
#include <fsfw/timemanager/Countdown.h>
#include <fsfw_hal/linux/uart/UartCookie.h>
#include <fsfw_hal/linux/serial/SerialCookie.h>
#include <termios.h> // Contains POSIX terminal control definitions
#include <array>

4
linux/devices/GPSHyperionLinuxController.cpp
View File

@ -18,9 +18,7 @@
GPSHyperionLinuxController::GPSHyperionLinuxController(object_id_t objectId, object_id_t parentId,
bool debugHyperionGps)
: ExtendedControllerBase(objectId, objects::NO_OBJECT),
gpsSet(this),
debugHyperionGps(debugHyperionGps) {
: ExtendedControllerBase(objectId), gpsSet(this), debugHyperionGps(debugHyperionGps) {
timeUpdateCd.resetTimer();
}

24
linux/devices/Max31865RtdLowlevelHandler.cpp
View File

@ -50,7 +50,7 @@ ReturnValue_t Max31865RtdReader::performOperation(uint8_t operationCode) {
}
bool Max31865RtdReader::rtdIsActive(uint8_t idx) {
if (rtds[idx]->on and rtds[idx]->active and rtds[idx]->configured) {
if (rtds[idx]->on and rtds[idx]->db.active and rtds[idx]->db.configured) {
return true;
}
return false;
@ -69,7 +69,7 @@ bool Max31865RtdReader::periodicInitHandling() {
if (rtd == nullptr) {
continue;
}
if ((rtd->on or rtd->active) and not rtd->configured and rtd->cd.hasTimedOut()) {
if ((rtd->on or rtd->db.active) and not rtd->db.configured and rtd->cd.hasTimedOut()) {
ManualCsLockWrapper mg(csLock, gpioIF, rtd->spiCookie, csTimeoutType, csTimeoutMs);
if (mg.lockResult != returnvalue::OK or mg.gpioResult != returnvalue::OK) {
sif::error << "Max31865RtdReader::periodicInitHandling: Manual CS lock failed" << std::endl;
@ -95,13 +95,7 @@ bool Max31865RtdReader::periodicInitHandling() {
if (result != returnvalue::OK) {
handleSpiError(rtd, result, "clearFaultStatus");
}
rtd->configured = true;
rtd->db.configured = true;
if (rtd->active) {
rtd->db.active = true;
}
}
if (rtd->active and rtd->configured and not rtd->db.active) {
rtd->db.active = true;
}
}
@ -241,8 +235,8 @@ ReturnValue_t Max31865RtdReader::sendMessage(CookieIF* cookie, const uint8_t* se
rtdCookie->cd.setTimeout(MAX31865::WARMUP_MS);
rtdCookie->cd.resetTimer();
rtdCookie->on = true;
rtdCookie->active = false;
rtdCookie->configured = false;
rtdCookie->db.active = false;
rtdCookie->db.configured = false;
if (sendLen == 5) {
thresholdHandler(rtdCookie, sendData);
}
@ -254,10 +248,10 @@ ReturnValue_t Max31865RtdReader::sendMessage(CookieIF* cookie, const uint8_t* se
rtdCookie->cd.setTimeout(MAX31865::WARMUP_MS);
rtdCookie->cd.resetTimer();
rtdCookie->on = true;
rtdCookie->active = true;
rtdCookie->configured = false;
rtdCookie->db.active = true;
rtdCookie->db.configured = false;
} else {
rtdCookie->active = true;
rtdCookie->db.active = true;
}
if (sendLen == 5) {
thresholdHandler(rtdCookie, sendData);
@ -266,8 +260,8 @@ ReturnValue_t Max31865RtdReader::sendMessage(CookieIF* cookie, const uint8_t* se
}
case (EiveMax31855::RtdCommands::OFF): {
rtdCookie->on = false;
rtdCookie->active = false;
rtdCookie->configured = false;
rtdCookie->db.active = false;
rtdCookie->db.configured = false;
break;
}
case (EiveMax31855::RtdCommands::HIGH_TRESHOLD): {

2
linux/devices/Max31865RtdLowlevelHandler.h
View File

@ -23,8 +23,6 @@ struct Max31865ReaderCookie : public CookieIF {
Countdown cd = Countdown(MAX31865::WARMUP_MS);
bool on = false;
bool configured = false;
bool active = false;
bool writeLowThreshold = false;
bool writeHighThreshold = false;
uint16_t lowThreshold = 0;

13
linux/devices/ScexUartReader.cpp
View File

@ -6,7 +6,7 @@
#include <fsfw/ipc/MutexGuard.h>
#include <fsfw/tasks/SemaphoreFactory.h>
#include <fsfw/tasks/TaskFactory.h>
#include <fsfw_hal/linux/uart/UartCookie.h>
#include <fsfw_hal/linux/serial/SerialCookie.h>
#include <unistd.h> // write(), read(), close()
#include <cerrno> // Error integer and strerror() function
@ -58,7 +58,7 @@ ReturnValue_t ScexUartReader::performOperation(uint8_t operationCode) {
result = tryDleParsing();
}
TaskFactory::delayTask(400);
TaskFactory::delayTask(150);
} else if (bytesRead < 0) {
sif::warning << "ScexUartReader::performOperation: read call failed with error [" << errno
<< ", " << strerror(errno) << "]" << std::endl;
@ -118,10 +118,7 @@ ReturnValue_t ScexUartReader::initializeInterface(CookieIF *cookie) {
tty.c_cc[VTIME] = 0;
tty.c_cc[VMIN] = 0;
// The SCEX experiment has a fixed baud rate.
if (cfsetispeed(&tty, B38400) != 0) {
sif::warning << "ScexUartReader::initializeInterface: Setting baud rate failed" << std::endl;
}
uart::setBaudrate(tty, uartCookie->getBaudrate());
if (tcsetattr(serialPort, TCSANOW, &tty) != 0) {
sif::warning << "ScexUartReader::initializeInterface: tcsetattr call failed with error ["
<< errno << ", " << strerror(errno) << std::endl;
@ -216,6 +213,10 @@ ReturnValue_t ScexUartReader::tryDleParsing() {
void ScexUartReader::reset() {
lock->lockMutex();
state = States::FINISH;
ipcRingBuf.clear();
while (not ipcQueue.empty()) {
ipcQueue.pop();
}
lock->unlockMutex();
}

2
linux/devices/ploc/PlocMPSoCHandler.cpp
View File

@ -31,7 +31,7 @@ ReturnValue_t PlocMPSoCHandler::initialize() {
if (result != returnvalue::OK) {
return result;
}
uartComIf = dynamic_cast<UartComIF*>(communicationInterface);
uartComIf = dynamic_cast<SerialComIF*>(communicationInterface);
if (uartComIf == nullptr) {
sif::warning << "PlocMPSoCHandler::initialize: Invalid uart com if" << std::endl;
return ObjectManagerIF::CHILD_INIT_FAILED;

4
linux/devices/ploc/PlocMPSoCHandler.h
View File

@ -10,7 +10,7 @@
#include "fsfw/ipc/QueueFactory.h"
#include "fsfw/tmtcservices/SourceSequenceCounter.h"
#include "fsfw_hal/linux/gpio/Gpio.h"
#include "fsfw_hal/linux/uart/UartComIF.h"
#include "fsfw_hal/linux/serial/SerialComIF.h"
#include "linux/devices/devicedefinitions/MPSoCReturnValuesIF.h"
#include "linux/devices/devicedefinitions/PlocMPSoCDefinitions.h"
#include "linux/devices/devicedefinitions/PlocSupervisorDefinitions.h"
@ -123,7 +123,7 @@ class PlocMPSoCHandler : public DeviceHandlerBase, public CommandsActionsIF {
*/
DeviceCommandId_t nextReplyId = mpsoc::NONE;
UartComIF* uartComIf = nullptr;
SerialComIF* uartComIf = nullptr;
PlocMPSoCHelper* plocMPSoCHelper = nullptr;
Gpio uartIsolatorSwitch;

2
linux/devices/ploc/PlocMPSoCHelper.cpp
View File

@ -57,7 +57,7 @@ ReturnValue_t PlocMPSoCHelper::performOperation(uint8_t operationCode) {
}
ReturnValue_t PlocMPSoCHelper::setComIF(DeviceCommunicationIF* communicationInterface_) {
uartComIF = dynamic_cast<UartComIF*>(communicationInterface_);
uartComIF = dynamic_cast<SerialComIF*>(communicationInterface_);
if (uartComIF == nullptr) {
sif::warning << "PlocMPSoCHelper::initialize: Invalid uart com if" << std::endl;
return returnvalue::FAILED;

4
linux/devices/ploc/PlocMPSoCHelper.h
View File

@ -9,7 +9,7 @@
#include "fsfw/returnvalues/returnvalue.h"
#include "fsfw/tasks/ExecutableObjectIF.h"
#include "fsfw/tmtcservices/SourceSequenceCounter.h"
#include "fsfw_hal/linux/uart/UartComIF.h"
#include "fsfw_hal/linux/serial/SerialComIF.h"
#include "linux/devices/devicedefinitions/PlocMPSoCDefinitions.h"
#ifdef XIPHOS_Q7S
#include "bsp_q7s/fs/SdCardManager.h"
@ -136,7 +136,7 @@ class PlocMPSoCHelper : public SystemObject, public ExecutableObjectIF {
* Communication interface of MPSoC responsible for low level access. Must be set by the
* MPSoC Handler.
*/
UartComIF* uartComIF = nullptr;
SerialComIF* uartComIF = nullptr;
// Communication cookie. Must be set by the MPSoC Handler
CookieIF* comCookie = nullptr;
// Sequence count, must be set by Ploc MPSoC Handler

7
linux/devices/ploc/PlocSupervisorHandler.cpp
View File

@ -46,7 +46,7 @@ ReturnValue_t PlocSupervisorHandler::initialize() {
if (result != returnvalue::OK) {
return result;
}
uartComIf = dynamic_cast<UartComIF*>(communicationInterface);
uartComIf = dynamic_cast<SerialComIF*>(communicationInterface);
if (uartComIf == nullptr) {
sif::warning << "PlocSupervisorHandler::initialize: Invalid uart com if" << std::endl;
return ObjectManagerIF::CHILD_INIT_FAILED;
@ -1917,6 +1917,11 @@ ReturnValue_t PlocSupervisorHandler::checkMramPacketApid() {
}
ReturnValue_t PlocSupervisorHandler::handleMramDumpFile(DeviceCommandId_t id) {
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
ReturnValue_t result = returnvalue::OK;
uint16_t packetLen = readSpacePacketLength(spacePacketBuffer);
uint8_t sequenceFlags = readSequenceFlags(spacePacketBuffer);

4
linux/devices/ploc/PlocSupervisorHandler.h
View File

@ -9,7 +9,7 @@
#include "fsfw/timemanager/Countdown.h"
#include "fsfw_hal/linux/gpio/Gpio.h"
#include "fsfw_hal/linux/gpio/LinuxLibgpioIF.h"
#include "fsfw_hal/linux/uart/UartComIF.h"
#include "fsfw_hal/linux/serial/SerialComIF.h"
#include "linux/devices/devicedefinitions/PlocSupervisorDefinitions.h"
#include "linux/devices/devicedefinitions/SupvReturnValuesIF.h"
@ -110,7 +110,7 @@ class PlocSupervisorHandler : public DeviceHandlerBase {
*/
DeviceCommandId_t nextReplyId = supv::NONE;
UartComIF* uartComIf = nullptr;
SerialComIF* uartComIf = nullptr;
LinuxLibgpioIF* gpioComIF = nullptr;
Gpio uartIsolatorSwitch;

8
linux/devices/ploc/PlocSupvHelper.cpp
View File

@ -1,6 +1,7 @@
#include "PlocSupvHelper.h"
#include <etl/crc16_ccitt.h>
#include <fsfw/filesystem/HasFileSystemIF.h>
#include <cmath>
#include <filesystem>
@ -94,7 +95,7 @@ ReturnValue_t PlocSupvHelper::performOperation(uint8_t operationCode) {
}
}
ReturnValue_t PlocSupvHelper::setComIF(UartComIF* uartComIF_) {
ReturnValue_t PlocSupvHelper::setComIF(SerialComIF* uartComIF_) {
if (uartComIF_ == nullptr) {
sif::warning << "PlocSupvHelper::initialize: Provided invalid uart com if" << std::endl;
return returnvalue::FAILED;
@ -748,6 +749,11 @@ uint32_t PlocSupvHelper::getFileSize(std::string filename) {
ReturnValue_t PlocSupvHelper::handleEventBufferReception(ploc::SpTmReader& reader) {
ReturnValue_t result = returnvalue::OK;
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
std::string filename = Filenaming::generateAbsoluteFilename(
eventBufferReq.path, eventBufferReq.filename, timestamping);
std::ofstream file(filename, std::ios_base::app | std::ios_base::out);

6
linux/devices/ploc/PlocSupvHelper.h
View File

@ -9,7 +9,7 @@
#include "fsfw/osal/linux/BinarySemaphore.h"
#include "fsfw/returnvalues/returnvalue.h"
#include "fsfw/tasks/ExecutableObjectIF.h"
#include "fsfw_hal/linux/uart/UartComIF.h"
#include "fsfw_hal/linux/serial/SerialComIF.h"
#include "linux/devices/devicedefinitions/PlocSupervisorDefinitions.h"
#ifdef XIPHOS_Q7S
@ -104,7 +104,7 @@ class PlocSupvHelper : public SystemObject, public ExecutableObjectIF {
ReturnValue_t initialize() override;
ReturnValue_t performOperation(uint8_t operationCode = 0) override;
ReturnValue_t setComIF(UartComIF* uartComfIF_);
ReturnValue_t setComIF(SerialComIF* uartComfIF_);
void setComCookie(CookieIF* comCookie_);
/**
@ -209,7 +209,7 @@ class PlocSupvHelper : public SystemObject, public ExecutableObjectIF {
/**
* Communication interface responsible for data transactions between OBC and Supervisor.
*/
UartComIF* uartComIF = nullptr;
SerialComIF* uartComIF = nullptr;
// Communication cookie. Must be set by the supervisor Handler
CookieIF* comCookie = nullptr;

24
linux/devices/startracker/StarTrackerHandler.cpp
View File

@ -240,13 +240,12 @@ void StarTrackerHandler::doStartUp() {
// the device handler's submode to the star tracker's mode
return;
case StartupState::DONE:
submode = SUBMODE_BOOTLOADER;
startupState = StartupState::IDLE;
break;
default:
return;
}
setMode(_MODE_TO_ON);
setMode(_MODE_TO_ON, SUBMODE_BOOTLOADER);
}
void StarTrackerHandler::doShutDown() {
@ -654,7 +653,7 @@ void StarTrackerHandler::fillCommandAndReplyMap() {
}
ReturnValue_t StarTrackerHandler::isModeCombinationValid(Mode_t mode, Submode_t submode) {
if (this->mode == MODE_NORMAL && mode == MODE_ON) {
if (getMode() == MODE_NORMAL && mode == MODE_ON) {
return TRANS_NOT_ALLOWED;
}
switch (mode) {
@ -678,7 +677,7 @@ ReturnValue_t StarTrackerHandler::isModeCombinationValid(Mode_t mode, Submode_t
}
void StarTrackerHandler::doTransition(Mode_t modeFrom, Submode_t subModeFrom) {
switch (mode) {
switch (getMode()) {
case _MODE_TO_ON:
doOnTransition(subModeFrom);
break;
@ -698,17 +697,18 @@ void StarTrackerHandler::doTransition(Mode_t modeFrom, Submode_t subModeFrom) {
}
void StarTrackerHandler::doOnTransition(Submode_t subModeFrom) {
if (submode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_FIRMWARE) {
uint8_t dhbSubmode = getSubmode();
if (dhbSubmode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_FIRMWARE) {
bootBootloader();
} else if (submode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_FIRMWARE) {
} else if (dhbSubmode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_FIRMWARE) {
setMode(MODE_ON);
} else if (submode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_BOOTLOADER) {
} else if (dhbSubmode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_BOOTLOADER) {
bootFirmware(MODE_ON);
} else if (submode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_BOOTLOADER) {
} else if (dhbSubmode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_BOOTLOADER) {
setMode(MODE_ON);
} else if (submode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_NONE) {
} else if (dhbSubmode == SUBMODE_BOOTLOADER && subModeFrom == SUBMODE_NONE) {
setMode(MODE_ON);
} else if (submode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_NONE) {
} else if (dhbSubmode == SUBMODE_FIRMWARE && subModeFrom == SUBMODE_NONE) {
setMode(MODE_ON);
}
}
@ -2067,13 +2067,13 @@ ReturnValue_t StarTrackerHandler::checkCommand(ActionId_t actionId) {
case startracker::REQ_SUBSCRIPTION:
case startracker::REQ_LOG_SUBSCRIPTION:
case startracker::REQ_DEBUG_CAMERA:
if (not(mode == MODE_ON && submode == startracker::Program::FIRMWARE)) {
if (not(getMode() == MODE_ON && getSubmode() == startracker::Program::FIRMWARE)) {
return STARTRACKER_RUNNING_BOOTLOADER;
}
break;
case startracker::FIRMWARE_UPDATE:
case startracker::FLASH_READ:
if (not(mode == MODE_ON && submode == startracker::Program::BOOTLOADER)) {
if (not(getMode() == MODE_ON && getSubmode() == startracker::Program::BOOTLOADER)) {
return STARTRACKER_RUNNING_FIRMWARE;
}
break;

2
linux/devices/startracker/StarTrackerHandler.h
View File

@ -72,7 +72,7 @@ class StarTrackerHandler : public DeviceHandlerBase {
ReturnValue_t initializeLocalDataPool(localpool::DataPool& localDataPoolMap,
LocalDataPoolManager& poolManager) override;
/**
* @brief Overwritten here to always read all available data from the UartComIF.
* @brief Overwritten here to always read all available data from theSerialComIF.
*/
virtual size_t getNextReplyLength(DeviceCommandId_t deviceCommand) override;
virtual ReturnValue_t doSendReadHook() override;

24
linux/devices/startracker/StrHelper.cpp
View File

@ -1,5 +1,7 @@
#include "StrHelper.h"
#include <fsfw/filesystem/HasFileSystemIF.h>
#include <filesystem>
#include <fstream>
@ -83,7 +85,7 @@ ReturnValue_t StrHelper::performOperation(uint8_t operationCode) {
}
ReturnValue_t StrHelper::setComIF(DeviceCommunicationIF* communicationInterface_) {
uartComIF = dynamic_cast<UartComIF*>(communicationInterface_);
uartComIF = dynamic_cast<SerialComIF*>(communicationInterface_);
if (uartComIF == nullptr) {
sif::warning << "StrHelper::initialize: Invalid uart com if" << std::endl;
return returnvalue::FAILED;
@ -176,6 +178,11 @@ void StrHelper::disableTimestamping() { timestamping = false; }
void StrHelper::enableTimestamping() { timestamping = true; }
ReturnValue_t StrHelper::performImageDownload() {
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
ReturnValue_t result;
#if OBSW_DEBUG_STARTRACKER == 1
ProgressPrinter progressPrinter("Image download", ImageDownload::LAST_POSITION);
@ -244,6 +251,11 @@ ReturnValue_t StrHelper::performImageUpload() {
uint32_t imageSize = 0;
struct UploadActionRequest uploadReq;
uploadReq.position = 0;
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
std::memset(&uploadReq.data, 0, sizeof(uploadReq.data));
if (not std::filesystem::exists(uploadImage.uploadFile)) {
triggerEvent(STR_HELPER_FILE_NOT_EXISTS, static_cast<uint32_t>(internalState));
@ -315,6 +327,11 @@ ReturnValue_t StrHelper::performFirmwareUpdate() {
}
ReturnValue_t StrHelper::performFlashWrite() {
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
ReturnValue_t result = returnvalue::OK;
uint32_t size = 0;
uint32_t bytesWritten = 0;
@ -394,6 +411,11 @@ ReturnValue_t StrHelper::performFlashWrite() {
}
ReturnValue_t StrHelper::performFlashRead() {
#ifdef XIPHOS_Q7S
if (not sdcMan->getActiveSdCard()) {
return HasFileSystemIF::FILESYSTEM_INACTIVE;
}
#endif
ReturnValue_t result;
#if OBSW_DEBUG_STARTRACKER == 1
ProgressPrinter progressPrinter("Flash read", flashRead.size);

4
linux/devices/startracker/StrHelper.h
View File

@ -15,7 +15,7 @@
#include "fsfw/osal/linux/BinarySemaphore.h"
#include "fsfw/returnvalues/returnvalue.h"
#include "fsfw/tasks/ExecutableObjectIF.h"
#include "fsfw_hal/linux/uart/UartComIF.h"
#include "fsfw_hal/linux/serial/SerialComIF.h"
extern "C" {
#include "thirdparty/arcsec_star_tracker/client/generated/actionreq.h"
@ -255,7 +255,7 @@ class StrHelper : public SystemObject, public ExecutableObjectIF {
* UART communication object responsible for low level access of star tracker
* Must be set by star tracker handler
*/
UartComIF* uartComIF = nullptr;
SerialComIF* uartComIF = nullptr;
// Communication cookie. Must be set by the star tracker handler
CookieIF* comCookie = nullptr;

7
linux/fsfwconfig/events/translateEvents.cpp
View File

@ -1,7 +1,7 @@
/**
* @brief Auto-generated event translation file. Contains 233 translations.
* @brief Auto-generated event translation file. Contains 234 translations.
* @details
* Generated on: 2022-10-21 15:41:33
* Generated on: 2022-11-10 18:07:26
*/
#include "translateEvents.h"
@ -144,6 +144,7 @@ const char *CARRIER_LOCK_STRING = "CARRIER_LOCK";
const char *BIT_LOCK_PDEC_STRING = "BIT_LOCK_PDEC";
const char *LOST_CARRIER_LOCK_PDEC_STRING = "LOST_CARRIER_LOCK_PDEC";
const char *LOST_BIT_LOCK_PDEC_STRING = "LOST_BIT_LOCK_PDEC";
const char *POLL_ERROR_PDEC_STRING = "POLL_ERROR_PDEC";
const char *IMAGE_UPLOAD_FAILED_STRING = "IMAGE_UPLOAD_FAILED";
const char *IMAGE_DOWNLOAD_FAILED_STRING = "IMAGE_DOWNLOAD_FAILED";
const char *IMAGE_UPLOAD_SUCCESSFUL_STRING = "IMAGE_UPLOAD_SUCCESSFUL";
@ -515,6 +516,8 @@ const char *translateEvents(Event event) {
return LOST_CARRIER_LOCK_PDEC_STRING;
case (12406):
return LOST_BIT_LOCK_PDEC_STRING;
case (12407):
return POLL_ERROR_PDEC_STRING;
case (12500):
return IMAGE_UPLOAD_FAILED_STRING;
case (12501):

26
linux/fsfwconfig/objects/translateObjects.cpp
View File

@ -1,8 +1,8 @@
/**
* @brief Auto-generated object translation file.
* @details
* Contains 140 translations.
* Generated on: 2022-10-21 15:41:33
* Contains 144 translations.
* Generated on: 2022-11-10 18:07:26
*/
#include "translateObjects.h"
@ -139,11 +139,15 @@ const char *ACS_BOARD_ASS_STRING = "ACS_BOARD_ASS";
const char *SUS_BOARD_ASS_STRING = "SUS_BOARD_ASS";
const char *TCS_BOARD_ASS_STRING = "TCS_BOARD_ASS";
const char *RW_ASS_STRING = "RW_ASS";
const char *CFDP_HANDLER_STRING = "CFDP_HANDLER";
const char *CFDP_DISTRIBUTOR_STRING = "CFDP_DISTRIBUTOR";
const char *CAM_SWITCHER_STRING = "CAM_SWITCHER";
const char *TM_FUNNEL_STRING = "TM_FUNNEL";
const char *PUS_TM_FUNNEL_STRING = "PUS_TM_FUNNEL";
const char *CFDP_TM_FUNNEL_STRING = "CFDP_TM_FUNNEL";
const char *CFDP_HANDLER_STRING = "CFDP_HANDLER";
const char *CFDP_DISTRIBUTOR_STRING = "CFDP_DISTRIBUTOR";
const char *EIVE_SYSTEM_STRING = "EIVE_SYSTEM";
const char *ACS_SUBSYSTEM_STRING = "ACS_SUBSYSTEM";
const char *PL_SUBSYSTEM_STRING = "PL_SUBSYSTEM";
const char *CCSDS_IP_CORE_BRIDGE_STRING = "CCSDS_IP_CORE_BRIDGE";
const char *NO_OBJECT_STRING = "NO_OBJECT";
@ -415,16 +419,24 @@ const char *translateObject(object_id_t object) {
return TCS_BOARD_ASS_STRING;
case 0x73000004:
return RW_ASS_STRING;
case 0x73000005:
return CFDP_HANDLER_STRING;
case 0x73000006:
return CFDP_DISTRIBUTOR_STRING;
return CAM_SWITCHER_STRING;
case 0x73000100:
return TM_FUNNEL_STRING;
case 0x73000101:
return PUS_TM_FUNNEL_STRING;
case 0x73000102:
return CFDP_TM_FUNNEL_STRING;
case 0x73000205:
return CFDP_HANDLER_STRING;
case 0x73000206:
return CFDP_DISTRIBUTOR_STRING;
case 0x73010000:
return EIVE_SYSTEM_STRING;
case 0x73010001:
return ACS_SUBSYSTEM_STRING;
case 0x73010002:
return PL_SUBSYSTEM_STRING;
case 0x73500000:
return CCSDS_IP_CORE_BRIDGE_STRING;
case 0xFFFFFFFF:

54
linux/fsfwconfig/pollingsequence/pollingSequenceFactory.cpp
View File

@ -430,11 +430,21 @@ ReturnValue_t pst::pstI2c(FixedTimeslotTaskIF *thisSequence) {
uint32_t length = thisSequence->getPeriodMs();
static_cast<void>(length);
#if OBSW_ADD_MGT == 1
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.4, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.6, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.8, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::IMTQ_HANDLER, length * 0.2, DeviceHandlerIF::GET_READ);
#endif
#if OBSW_ADD_BPX_BATTERY_HANDLER == 1
thisSequence->addSlot(objects::BPX_BATT_HANDLER, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
@ -450,32 +460,9 @@ ReturnValue_t pst::pstI2c(FixedTimeslotTaskIF *thisSequence) {
ReturnValue_t pst::pstUart(FixedTimeslotTaskIF *thisSequence) {
// Length of a communication cycle
uint32_t length = thisSequence->getPeriodMs();
bool uartPstEmpty = true;
#if OBSW_ADD_PLOC_MPSOC == 1
uartPstEmpty = false;
thisSequence->addSlot(objects::PLOC_MPSOC_HANDLER, length * 0,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::PLOC_MPSOC_HANDLER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::PLOC_MPSOC_HANDLER, length * 0.4, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::PLOC_MPSOC_HANDLER, length * 0.6, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::PLOC_MPSOC_HANDLER, length * 0.8, DeviceHandlerIF::GET_READ);
#endif
thisSequence->addSlot(objects::PLOC_MEMORY_DUMPER, length * 0,
DeviceHandlerIF::PERFORM_OPERATION);
#if OBSW_ADD_PLOC_SUPERVISOR == 1
thisSequence->addSlot(objects::PLOC_SUPERVISOR_HANDLER, length * 0,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::PLOC_SUPERVISOR_HANDLER, length * 0.2,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::PLOC_SUPERVISOR_HANDLER, length * 0.4, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::PLOC_SUPERVISOR_HANDLER, length * 0.6, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::PLOC_SUPERVISOR_HANDLER, length * 0.8, DeviceHandlerIF::GET_READ);
#endif
static_cast<void>(length);
#if OBSW_ADD_SYRLINKS == 1
uartPstEmpty = false;
thisSequence->addSlot(objects::SYRLINKS_HK_HANDLER, length * 0,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::SYRLINKS_HK_HANDLER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
@ -485,22 +472,13 @@ ReturnValue_t pst::pstUart(FixedTimeslotTaskIF *thisSequence) {
#endif
#if OBSW_ADD_STAR_TRACKER == 1
uartPstEmpty = false;
thisSequence->addSlot(objects::STAR_TRACKER, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::STAR_TRACKER, length * 0.2, DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::STAR_TRACKER, length * 0.4, DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::STAR_TRACKER, length * 0.6, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::STAR_TRACKER, length * 0.8, DeviceHandlerIF::GET_READ);
#endif
static_cast<void>(length);
if (uartPstEmpty) {
return returnvalue::OK;
}
if (thisSequence->checkSequence() != returnvalue::OK) {
sif::error << "UART PST initialization failed" << std::endl;
return returnvalue::FAILED;
}
return returnvalue::OK;
return thisSequence->checkSequence();
}
ReturnValue_t pst::pstGompaceCan(FixedTimeslotTaskIF *thisSequence) {

2
linux/obc/AxiPtmeConfig.cpp → linux/ipcore/AxiPtmeConfig.cpp
View File

@ -4,7 +4,7 @@
#include "fsfw_hal/linux/uio/UioMapper.h"
AxiPtmeConfig::AxiPtmeConfig(object_id_t objectId, std::string axiUio, int mapNum)
: SystemObject(objectId), axiUio(axiUio), mapNum(mapNum) {
: SystemObject(objectId), axiUio(std::move(axiUio)), mapNum(mapNum) {
mutex = MutexFactory::instance()->createMutex();
if (mutex == nullptr) {
sif::warning << "Failed to create mutex" << std::endl;

0
linux/obc/AxiPtmeConfig.h → linux/ipcore/AxiPtmeConfig.h
View File

0
linux/obc/CMakeLists.txt → linux/ipcore/CMakeLists.txt
View File

4
linux/obc/PapbVcInterface.cpp → linux/ipcore/PapbVcInterface.cpp
View File

@ -1,5 +1,5 @@
#include <fsfw_hal/linux/uio/UioMapper.h>
#include <linux/obc/PapbVcInterface.h>
#include <linux/ipcore/PapbVcInterface.h>
#include "fsfw/serviceinterface/ServiceInterface.h"
@ -8,7 +8,7 @@ PapbVcInterface::PapbVcInterface(LinuxLibgpioIF* gpioComIF, gpioId_t papbBusyId,
: gpioComIF(gpioComIF),
papbBusyId(papbBusyId),
papbEmptyId(papbEmptyId),
uioFile(uioFile),
uioFile(std::move(uioFile)),
mapNum(mapNum) {}
PapbVcInterface::~PapbVcInterface() {}

2
linux/obc/PapbVcInterface.h → linux/ipcore/PapbVcInterface.h
View File

@ -6,7 +6,7 @@
#include "OBSWConfig.h"
#include "fsfw/returnvalues/returnvalue.h"
#include "linux/obc/VcInterfaceIF.h"
#include "linux/ipcore/VcInterfaceIF.h"
/**
* @brief This class handles the transmission of data to a virtual channel of the PTME IP Core

5
linux/obc/PdecConfig.cpp → linux/ipcore/PdecConfig.cpp
View File

@ -31,3 +31,8 @@ uint32_t PdecConfig::getConfigWord(uint8_t wordNo) {
}
return configWords[wordNo];
}
uint32_t PdecConfig::getImrReg() {
return static_cast<uint32_t>(enableNewFarIrq << 2) |
static_cast<uint32_t>(enableTcAbortIrq << 1) | static_cast<uint32_t>(enableTcNewIrq);
}

4
linux/obc/PdecConfig.h → linux/ipcore/PdecConfig.h
View File

@ -23,6 +23,7 @@ class PdecConfig {
* @brief Returns the configuration word by specifying the position.
*/
uint32_t getConfigWord(uint8_t wordNo);
uint32_t getImrReg();
private:
// TC transfer frame configuration parameters
@ -45,6 +46,9 @@ class PdecConfig {
static const uint8_t CONFIG_WORDS_NUM = 2;
uint32_t configWords[CONFIG_WORDS_NUM];
bool enableTcNewIrq = true;
bool enableTcAbortIrq = true;
bool enableNewFarIrq = true;
void initialize();
};

235
linux/obc/PdecHandler.cpp → linux/ipcore/PdecHandler.cpp
View File

@ -1,7 +1,9 @@
#include "PdecHandler.h"
#include <fcntl.h>
#include <poll.h>
#include <sys/mman.h>
#include <unistd.h>
#include <cstring>
#include <sstream>
@ -12,18 +14,21 @@
#include "fsfw/serviceinterface/ServiceInterface.h"
#include "fsfw/tmtcservices/TmTcMessage.h"
#include "fsfw_hal/linux/uio/UioMapper.h"
#include "pdec.h"
using namespace pdec;
// If this is ever shared, protect it with a mutex!
uint32_t PdecHandler::CURRENT_FAR = 0;
PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioConfigMemory,
std::string uioRamMemory, std::string uioRegisters)
LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names)
: SystemObject(objectId),
tcDestinationId(tcDestinationId),
gpioComIF(gpioComIF),
pdecReset(pdecReset),
uioConfigMemory(uioConfigMemory),
uioRamMemory(uioRamMemory),
uioRegisters(uioRegisters),
actionHelper(this, nullptr) {
actionHelper(this, nullptr),
uioNames(names) {
auto mqArgs = MqArgs(objectId, static_cast<void*>(this));
commandQueue = QueueFactory::instance()->createMessageQueue(
QUEUE_SIZE, MessageQueueMessage::MAX_MESSAGE_SIZE, &mqArgs);
@ -47,29 +52,39 @@ ReturnValue_t PdecHandler::initialize() {
ReturnValue_t result = returnvalue::OK;
UioMapper regMapper(uioRegisters);
UioMapper regMapper(uioNames.registers);
result = regMapper.getMappedAdress(&registerBaseAddress, UioMapper::Permissions::READ_WRITE);
if (result != returnvalue::OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
UioMapper configMemMapper(uioConfigMemory);
UioMapper configMemMapper(uioNames.configMemory);
result = configMemMapper.getMappedAdress(&memoryBaseAddress, UioMapper::Permissions::READ_WRITE);
if (result != returnvalue::OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
UioMapper ramMapper(uioRamMemory);
UioMapper ramMapper(uioNames.ramMemory);
result = ramMapper.getMappedAdress(&ramBaseAddress, UioMapper::Permissions::READ_WRITE);
if (result != returnvalue::OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
writePdecConfig();
if (OP_MODE == Modes::IRQ and uioNames.irq == nullptr) {
sif::error << "Can not use IRQ mode if IRQ UIO name is invalid" << std::endl;
return returnvalue::FAILED;
}
PdecConfig pdecConfig;
writePdecConfigDuringReset(pdecConfig);
result = releasePdec();
if (result != returnvalue::OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
// This configuration must be done while the PDEC is not held in reset.
if (OP_MODE == Modes::IRQ) {
// Configure interrupt mask register to enable interrupts
*(registerBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
}
result = actionHelper.initialize(commandQueue);
if (result != returnvalue::OK) {
return result;
@ -78,59 +93,16 @@ ReturnValue_t PdecHandler::initialize() {
return returnvalue::OK;
}
MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
void PdecHandler::writePdecConfig() {
PdecConfig pdecConfig;
*(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
*(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
// Configure all MAP IDs as invalid
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx + 1 / 4) =
NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
}
// All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) =
(NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8) | routeToPm;
// Write map id clock frequencies
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) =
MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
}
}
ReturnValue_t PdecHandler::resetFarStatFlag() {
uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
if (pdecFar != FAR_RESET) {
sif::warning << "PdecHandler::resetFarStatFlag: FAR register did not match expected value."
<< " Read value: 0x" << std::hex << static_cast<unsigned int>(pdecFar)
<< std::endl;
return returnvalue::FAILED;
}
#if OBSW_DEBUG_PDEC_HANDLER == 1
sif::debug << "PdecHandler::resetFarStatFlag: read FAR with value: 0x" << std::hex << pdecFar
<< std::endl;
#endif /* OBSW_DEBUG_PDEC_HANDLER == 1 */
return returnvalue::OK;
}
ReturnValue_t PdecHandler::releasePdec() {
ReturnValue_t result = returnvalue::OK;
result = gpioComIF->pullHigh(pdecReset);
if (result != returnvalue::OK) {
sif::error << "PdecHandler::releasePdec: Failed to release PDEC reset signal" << std::endl;
}
return result;
}
ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
ReturnValue_t result = returnvalue::OK;
if (OP_MODE == Modes::POLLED) {
return polledOperation();
} else if (OP_MODE == Modes::IRQ) {
return irqOperation();
}
}
ReturnValue_t PdecHandler::polledOperation() {
ReturnValue_t result = returnvalue::OK;
readCommandQueue();
switch (state) {
@ -153,13 +125,94 @@ ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
case State::WAIT_FOR_RECOVERY:
break;
default:
sif::debug << "PdecHandler::performOperation: Invalid state" << std::endl;
sif::error << "PdecHandler::performOperation: Invalid state" << std::endl;
break;
}
return returnvalue::OK;
}
ReturnValue_t PdecHandler::irqOperation() {
ReturnValue_t result = returnvalue::OK;
int fd = open(uioNames.irq, O_RDWR);
if (fd < 0) {
sif::error << "PdecHandler::irqOperation: Opening UIO IRQ file" << uioNames.irq << " failed"
<< std::endl;
return returnvalue::FAILED;
}
struct pollfd fds = {.fd = fd, .events = POLLIN, .revents = 0};
// Used to unmask IRQ
uint32_t info = 1;
ssize_t nb = 0;
int ret = 0;
// Clear interrupts with dummy read before unmasking the interrupt
ret = *(registerBaseAddress + PDEC_PIR_OFFSET);
while (true) {
readCommandQueue();
switch (state) {
case State::INIT:
resetFarStatFlag();
if (result != returnvalue::OK) {
// Requires reconfiguration and reinitialization of PDEC
triggerEvent(INVALID_FAR);
state = State::WAIT_FOR_RECOVERY;
return result;
}
state = State::RUNNING;
break;
case State::RUNNING: {
nb = write(fd, &info, sizeof(info));
if (nb != static_cast<ssize_t>(sizeof(info))) {
sif::error << "PdecHandler::irqOperation: Unmasking IRQ failed" << std::endl;
close(fd);
}
ret = poll(&fds, 1, IRQ_TIMEOUT_MS);
if (ret == 0) {
// No TCs for timeout period
checkLocks();
lockCheckCd.resetTimer();
} else if (ret >= 1) {
nb = read(fd, &info, sizeof(info));
if (nb == static_cast<ssize_t>(sizeof(info))) {
uint32_t pisr = *(registerBaseAddress + PDEC_PISR_OFFSET);
if ((pisr & TC_NEW_MASK) == TC_NEW_MASK) {
// handle TC
handleNewTc();
}
if ((pisr & TC_ABORT_MASK) == TC_ABORT_MASK) {
tcAbortCounter += 1;
}
if ((pisr & NEW_FAR_MASK) == NEW_FAR_MASK) {
// Read FAR here
CURRENT_FAR = readFar();
}
if (lockCheckCd.hasTimedOut()) {
checkLocks();
lockCheckCd.resetTimer();
}
// Clear interrupts with dummy read
ret = *(registerBaseAddress + PDEC_PIR_OFFSET);
}
} else {
sif::error << "PdecHandler::irqOperation: Poll error with errno " << errno << ": "
<< strerror(errno) << std::endl;
triggerEvent(POLL_ERROR_PDEC, errno);
}
break;
}
case State::WAIT_FOR_RECOVERY:
break;
default:
sif::error << "PdecHandler::performOperation: Invalid state" << std::endl;
break;
}
}
return returnvalue::OK;
}
void PdecHandler::readCommandQueue(void) {
CommandMessage commandMessage;
ReturnValue_t result = returnvalue::FAILED;
@ -177,13 +230,65 @@ void PdecHandler::readCommandQueue(void) {
}
}
MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
void PdecHandler::writePdecConfigDuringReset(PdecConfig& pdecConfig) {
*(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
*(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
// Configure all MAP IDs as invalid
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) =
NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
}
// All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) =
(NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8) | routeToPm;
// Write map id clock frequencies
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) =
MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
}
}
ReturnValue_t PdecHandler::resetFarStatFlag() {
uint32_t pdecFar = readFar();
if ((pdecFar & FAR_STAT_MASK) != 0) {
sif::warning << "PdecHandler::resetFarStatFlag: FAR register stat bit is not 0."
<< " Read value for FAR: 0x" << std::hex << static_cast<unsigned int>(pdecFar)
<< std::endl;
CURRENT_FAR = pdecFar;
return returnvalue::FAILED;
}
#if OBSW_DEBUG_PDEC_HANDLER == 1
sif::debug << "PdecHandler::resetFarStatFlag: read FAR with value: 0x" << std::hex << pdecFar
<< std::endl;
#endif /* OBSW_DEBUG_PDEC_HANDLER == 1 */
CURRENT_FAR = pdecFar;
return returnvalue::OK;
}
ReturnValue_t PdecHandler::releasePdec() {
ReturnValue_t result = returnvalue::OK;
result = gpioComIF->pullHigh(pdecReset);
if (result != returnvalue::OK) {
sif::error << "PdecHandler::releasePdec: Failed to release PDEC reset signal" << std::endl;
}
return result;
}
bool PdecHandler::newTcReceived() {
uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
uint32_t pdecFar = readFar();
if (pdecFar >> STAT_POSITION != NEW_FAR_RECEIVED) {
CURRENT_FAR = pdecFar;
return false;
}
if (!checkFrameAna(pdecFar)) {
CURRENT_FAR = pdecFar;
return false;
}
return true;
@ -331,7 +436,6 @@ void PdecHandler::handleNewTc() {
printTC(tcLength);
#endif /* OBSW_DEBUG_PDEC_HANDLER */
#if OBSW_TC_FROM_PDEC == 1
store_address_t storeId;
result = tcStore->addData(&storeId, tcSegment + 1, tcLength - 1);
if (result != returnvalue::OK) {
@ -349,7 +453,6 @@ void PdecHandler::handleNewTc() {
tcStore->deleteData(storeId);
return;
}
#endif /* OBSW_TC_FROM_PDEC == 1 */
return;
}
@ -500,6 +603,8 @@ void PdecHandler::printPdecMon() {
sif::info << std::setw(30) << std::left << "Start sequence lock: " << lock << std::endl;
}
uint32_t PdecHandler::readFar() { return *(registerBaseAddress + PDEC_FAR_OFFSET); }
std::string PdecHandler::getMonStatusString(uint32_t status) {
switch (status) {
case TC_CHANNEL_INACTIVE:

168
linux/obc/PdecHandler.h → linux/ipcore/PdecHandler.h
View File

@ -1,6 +1,8 @@
#ifndef LINUX_OBC_PDECHANDLER_H_
#define LINUX_OBC_PDECHANDLER_H_
#include <fsfw/timemanager/Countdown.h>
#include "OBSWConfig.h"
#include "PdecConfig.h"
#include "fsfw/action/ActionHelper.h"
@ -13,6 +15,13 @@
#include "fsfw_hal/common/gpio/gpioDefinitions.h"
#include "fsfw_hal/linux/gpio/LinuxLibgpioIF.h"
struct UioNames {
const char* configMemory;
const char* ramMemory;
const char* registers;
const char* irq;
};
/**
* @brief This class controls the PDEC IP Core implemented in the programmable logic of the
* Zynq-7020. All registers and memories of the PDEC IP Core are accessed via UIO
@ -33,6 +42,10 @@
*/
class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasActionsIF {
public:
static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
enum class Modes { POLLED, IRQ };
/**
* @brief Constructor
* @param objectId Object ID of PDEC handler system object
@ -43,8 +56,7 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
* @param uioregsiters String of uio device file same mapped to the PDEC register space
*/
PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
gpioId_t pdecReset, std::string uioConfigMemory, std::string uioRamMemory,
std::string uioRegisters);
gpioId_t pdecReset, UioNames names);
virtual ~PdecHandler();
@ -74,10 +86,13 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
static const Event LOST_CARRIER_LOCK_PDEC = MAKE_EVENT(5, severity::INFO);
//! [EXPORT] : [COMMENT] Lost bit lock
static const Event LOST_BIT_LOCK_PDEC = MAKE_EVENT(6, severity::INFO);
static constexpr Event POLL_ERROR_PDEC = event::makeEvent(SUBSYSTEM_ID, 7, severity::MEDIUM);
private:
static const uint8_t INTERFACE_ID = CLASS_ID::PDEC_HANDLER;
static constexpr Modes OP_MODE = Modes::IRQ;
static const ReturnValue_t ABANDONED_CLTU = MAKE_RETURN_CODE(0xA0);
static const ReturnValue_t FRAME_DIRTY = MAKE_RETURN_CODE(0xA1);
static const ReturnValue_t FRAME_ILLEGAL_ONE_REASON = MAKE_RETURN_CODE(0xA2);
@ -112,48 +127,6 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
// Print PDEC monitor register
static const ActionId_t PRINT_PDEC_MON = 1;
static const uint8_t STAT_POSITION = 31;
static const uint8_t FRAME_ANA_POSITION = 28;
static const uint8_t IREASON_POSITION = 25;
static const uint8_t NEW_FAR_RECEIVED = 0;
static const uint32_t FRAME_ANA_MASK = 0x70000000;
static const uint32_t IREASON_MASK = 0x0E000000;
static const uint32_t TC_CHANNEL_INACTIVE = 0x0;
static const uint32_t TC_CHANNEL_ACTIVE = 0x1;
static const uint32_t TC_CHANNEL_TIMEDOUT = 0x2;
static const uint32_t TC0_STATUS_MASK = 0x3;
static const uint32_t TC1_STATUS_MASK = 0xC;
static const uint32_t TC2_STATUS_MASK = 0x300;
static const uint32_t TC3_STATUS_MASK = 0xC00;
static const uint32_t TC4_STATUS_MASK = 0x30000;
static const uint32_t TC5_STATUS_MASK = 0xc00000;
// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
static const uint32_t LOCK_MASK = 0xc00000;
static const uint32_t TC0_STATUS_POS = 0;
static const uint32_t TC1_STATUS_POS = 2;
static const uint32_t TC2_STATUS_POS = 4;
static const uint32_t TC3_STATUS_POS = 6;
static const uint32_t TC4_STATUS_POS = 8;
static const uint32_t TC5_STATUS_POS = 10;
// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
static const uint32_t LOCK_POS = 12;
/**
* UIO is 4 byte aligned. Thus offset is calculated with "true offset" / 4
* Example: PDEC_FAR = 0x2840 => Offset in virtual address space is 0xA10
*/
static const uint32_t PDEC_FAR_OFFSET = 0xA10;
static const uint32_t PDEC_CLCW_OFFSET = 0xA12;
static const uint32_t PDEC_BFREE_OFFSET = 0xA24;
static const uint32_t PDEC_BPTR_OFFSET = 0xA25;
static const uint32_t PDEC_SLEN_OFFSET = 0xA26;
static const uint32_t PDEC_MON_OFFSET = 0xA27;
#ifdef TE0720_1CFA
static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
static const int RAM_MAP_SIZE = 0x4000;
@ -227,16 +200,69 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
enum class State : uint8_t { INIT, RUNNING, WAIT_FOR_RECOVERY };
static uint32_t CURRENT_FAR;
Countdown lockCheckCd = Countdown(IRQ_TIMEOUT_MS);
object_id_t tcDestinationId;
AcceptsTelecommandsIF* tcDestination = nullptr;
LinuxLibgpioIF* gpioComIF = nullptr;
/**
* Reset signal is required to hold PDEC in reset state until the configuration has been
* written to the appropriate memory space.
* Can also be used to reboot PDEC in case of erros.
*/
gpioId_t pdecReset = gpio::NO_GPIO;
uint32_t tcAbortCounter = 0;
ActionHelper actionHelper;
StorageManagerIF* tcStore = nullptr;
MessageQueueIF* commandQueue = nullptr;
State state = State::INIT;
/**
* Pointer pointing to base address of the PDEC memory space.
* This address is equivalent with the base address of the section named configuration area in
* the PDEC datasheet.
*/
uint32_t* memoryBaseAddress = nullptr;
uint32_t* ramBaseAddress = nullptr;
// Pointer pointing to base address of register space
uint32_t* registerBaseAddress = nullptr;
uint8_t tcSegment[TC_SEGMENT_LEN];
// Used to check carrier and bit lock changes (default set to no rf and no bitlock)
uint32_t lastClcw = 0xC000;
bool carrierLock = false;
bool bitLock = false;
UioNames uioNames;
/**
* @brief Reads and handles messages stored in the commandQueue
*/
void readCommandQueue(void);
ReturnValue_t polledOperation();
ReturnValue_t irqOperation();
uint32_t readFar();
/**
* @brief This functions writes the configuration parameters to the configuration
* section of the PDEC.
*/
void writePdecConfig();
void writePdecConfigDuringReset(PdecConfig& config);
/**
* @brief Reading the FAR resets the set stat flag which signals a new TC. Without clearing
@ -343,58 +369,6 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
void printPdecMon();
std::string getMonStatusString(uint32_t status);
object_id_t tcDestinationId;
AcceptsTelecommandsIF* tcDestination = nullptr;
LinuxLibgpioIF* gpioComIF = nullptr;
/**
* Reset signal is required to hold PDEC in reset state until the configuration has been
* written to the appropriate memory space.
* Can also be used to reboot PDEC in case of erros.
*/
gpioId_t pdecReset = gpio::NO_GPIO;
// UIO device file giving access to the PDEC configuration memory section
std::string uioConfigMemory;
// UIO device file giving access to the PDEC RAM section
std::string uioRamMemory;
// UIO device file giving access to the PDEC register space
std::string uioRegisters;
ActionHelper actionHelper;
StorageManagerIF* tcStore = nullptr;
MessageQueueIF* commandQueue = nullptr;
State state = State::INIT;
/**
* Pointer pointing to base address of the PDEC memory space.
* This address is equivalent with the base address of the section named configuration area in
* the PDEC datasheet.
*/
uint32_t* memoryBaseAddress = nullptr;
uint32_t* ramBaseAddress = nullptr;
// Pointer pointing to base address of register space
uint32_t* registerBaseAddress = nullptr;
uint32_t pdecFar = 0;
uint8_t tcSegment[TC_SEGMENT_LEN];
// Used to check carrier and bit lock changes (default set to no rf and no bitlock)
uint32_t lastClcw = 0xC000;
bool carrierLock = false;
bool bitLock = false;
};
#endif /* LINUX_OBC_PDECHANDLER_H_ */

2
linux/obc/Ptme.cpp → linux/ipcore/Ptme.cpp
View File

@ -1,5 +1,5 @@
#include <fcntl.h>
#include <linux/obc/Ptme.h>
#include <linux/ipcore/Ptme.h>
#include <sys/mman.h>
#include <unistd.h>

4
linux/obc/Ptme.h → linux/ipcore/Ptme.h
View File

@ -9,8 +9,8 @@
#include "OBSWConfig.h"
#include "fsfw/returnvalues/returnvalue.h"
#include "linux/obc/PtmeIF.h"
#include "linux/obc/VcInterfaceIF.h"
#include "linux/ipcore/PtmeIF.h"
#include "linux/ipcore/VcInterfaceIF.h"
/**
* @brief This class handles the interfacing to the telemetry (PTME) IP core responsible for the

0
linux/obc/PtmeConfig.cpp → linux/ipcore/PtmeConfig.cpp
View File

2
linux/obc/PtmeConfig.h → linux/ipcore/PtmeConfig.h
View File

@ -4,7 +4,7 @@
#include "AxiPtmeConfig.h"
#include "fsfw/objectmanager/SystemObject.h"
#include "fsfw/returnvalues/returnvalue.h"
#include "linux/obc/PtmeConfig.h"
#include "linux/ipcore/PtmeConfig.h"
#include "returnvalues/classIds.h"
/**

0
linux/obc/PtmeIF.h → linux/ipcore/PtmeIF.h
View File

0
linux/obc/VcInterfaceIF.h → linux/ipcore/VcInterfaceIF.h
View File

61
linux/ipcore/pdec.h Normal file
View File

@ -0,0 +1,61 @@
#ifndef LINUX_OBC_PDEC_H_
#define LINUX_OBC_PDEC_H_
#include <cstdint>
namespace pdec {
static const uint8_t STAT_POSITION = 31;
static const uint8_t FRAME_ANA_POSITION = 28;
static const uint8_t IREASON_POSITION = 25;
static const uint8_t NEW_FAR_RECEIVED = 0;
static constexpr uint32_t NEW_FAR_MASK = 1 << 2;
static constexpr uint32_t TC_ABORT_MASK = 1 << 1;
static constexpr uint32_t TC_NEW_MASK = 1 << 0;
static constexpr uint32_t FAR_STAT_MASK = 1 << 31;
static const uint32_t FRAME_ANA_MASK = 0x70000000;
static const uint32_t IREASON_MASK = 0x0E000000;
static const uint32_t TC_CHANNEL_INACTIVE = 0x0;
static const uint32_t TC_CHANNEL_ACTIVE = 0x1;
static const uint32_t TC_CHANNEL_TIMEDOUT = 0x2;
static const uint32_t TC0_STATUS_MASK = 0x3;
static const uint32_t TC1_STATUS_MASK = 0xC;
static const uint32_t TC2_STATUS_MASK = 0x300;
static const uint32_t TC3_STATUS_MASK = 0xC00;
static const uint32_t TC4_STATUS_MASK = 0x30000;
static const uint32_t TC5_STATUS_MASK = 0xc00000;
// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
static const uint32_t LOCK_MASK = 0xc00000;
static const uint32_t TC0_STATUS_POS = 0;
static const uint32_t TC1_STATUS_POS = 2;
static const uint32_t TC2_STATUS_POS = 4;
static const uint32_t TC3_STATUS_POS = 6;
static const uint32_t TC4_STATUS_POS = 8;
static const uint32_t TC5_STATUS_POS = 10;
// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
static const uint32_t LOCK_POS = 12;
/**
* UIO is 4 byte aligned. Thus offset is calculated with "true offset" / 4
* Example: PDEC_FAR = 0x2840 => Offset in virtual address space is 0xA10
*/
static constexpr uint32_t PDEC_PISR_OFFSET = 0xA02;
static constexpr uint32_t PDEC_PIR_OFFSET = 0xA03;
static constexpr uint32_t PDEC_IMR_OFFSET = 0xA04;
static const uint32_t PDEC_FAR_OFFSET = 0xA10;
static const uint32_t PDEC_CLCW_OFFSET = 0xA12;
static const uint32_t PDEC_BFREE_OFFSET = 0xA24;
static const uint32_t PDEC_BPTR_OFFSET = 0xA25;
static const uint32_t PDEC_SLEN_OFFSET = 0xA26;
static const uint32_t PDEC_MON_OFFSET = 0xA27;
} // namespace pdec
#endif /* LINUX_OBC_PDEC_H_ */