eive/eive-obsw
13
4
Fork 0
Code Issues 4 Pull Requests 1 Releases 121 Wiki Activity

somethings still wrong
All checks were successful
EIVE/eive-obsw/pipeline/head This commit looks good
Details

Browse Source
This commit is contained in:
Robin Müller
2022-02-14 18:38:35 +01:00
parent 1981be6e2f
commit 2a4905a1f7
5 changed files with 96 additions and 103 deletions
Download Patch File Download Diff File Expand all files Collapse all files

170
bsp_q7s/callbacks/gpioCallbacks.cpp
View File

@ -25,38 +25,28 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
GpiodRegularByLineName* spiMuxBit = nullptr;
/** Setting mux bit 1 to low will disable IC21 on the interface board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_0_PIN, "SPI Mux Bit 1",
gpio::DIR_OUT, gpio::HIGH);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_0, spiMuxBit);
/** Setting mux bit 2 to low disables IC1 on the TCS board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 2",
gpio::DIR_OUT, gpio::HIGH);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
/** Setting mux bit 2 to low disables IC1 on the TCS board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2",
gpio::DIR_OUT, gpio::HIGH);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3",
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 3",
gpio::DIR_OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
// gpio::OUT, gpio::LOW);
// spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
// /** Setting mux bit 2 to low disables IC1 on the TCS board */
// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2",
// gpio::OUT, gpio::HIGH); spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
// /** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board
// */ spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit
// 3", gpio::OUT, gpio::LOW); spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
/** The following gpios can take arbitrary initial values */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 4",
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 4",
gpio::DIR_OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 5",
gpio::DIR_OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 5",
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 6",
gpio::DIR_OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_6_PIN, "SPI Mux Bit 6",
gpio::DIR_OUT, gpio::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_6, spiMuxBit);
GpiodRegularByLineName* enRwDecoder =
new GpiodRegularByLineName(q7s::gpioNames::EN_RW_CS, "EN_RW_CS", gpio::DIR_OUT, gpio::HIGH);
spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
@ -307,45 +297,45 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
break;
}
case (gpioIds::CS_SUS_2): {
selectY0();
enableDecoderInterfaceBoardIc2();
selectY2();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_3): {
selectY1();
enableDecoderInterfaceBoardIc2();
selectY3();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_4): {
selectY2();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_5): {
selectY2();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_6): {
selectY3();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_7): {
selectY3();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_8): {
selectY4();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_9): {
case (gpioIds::CS_SUS_5): {
selectY5();
enableDecoderInterfaceBoardIc1();
break;
}
case (gpioIds::CS_SUS_6): {
selectY0();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_7): {
selectY1();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_8): {
selectY2();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_9): {
selectY3();
enableDecoderInterfaceBoardIc2();
break;
}
case (gpioIds::CS_SUS_10): {
selectY4();
enableDecoderInterfaceBoardIc2();
@ -385,52 +375,52 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
}
void enableDecoderTcsIc1() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void enableDecoderTcsIc2() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
}
void enableDecoderInterfaceBoardIc1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void enableDecoderInterfaceBoardIc2() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
}
void enableDecoderInterfaceBoardIc1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
}
void enableDecoderInterfaceBoardIc2() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void disableDecoderTcsIc1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void disableDecoderTcsIc2() {
// DO NOT CHANGE THE ORDER HERE
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
}
void disableDecoderInterfaceBoardIc1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void disableDecoderInterfaceBoardIc2() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
}
void enableRwDecoder() { gpioComInterface->pullHigh(gpioIds::EN_RW_CS); }
@ -438,57 +428,57 @@ void enableRwDecoder() { gpioComInterface->pullHigh(gpioIds::EN_RW_CS); }
void disableRwDecoder() { gpioComInterface->pullLow(gpioIds::EN_RW_CS); }
void selectY0() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY2() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
}
void selectY3() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
}
void selectY4() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
}
void selectY5() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
}
void selectY6() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void selectY7() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void disableAllDecoder() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
}