Merge pull request 'PDEC DTB update' (#794) from pdec-dtb-update into main
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Reviewed-on: #794 Reviewed-by: Marius Eggert <eggertm@irs.uni-stuttgart.de>
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34a82b6e6c
@ -16,6 +16,13 @@ will consitute of a breaking change warranting a new major release:
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# [unreleased]
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# [unreleased]
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## Changed
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- Changed the memory initialized for the PDEC Config Memory and the PDEC RAM by using `mmap`
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directly and ignoring UIO. This makes the OBSW compatible to a device tree update, where those
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memory segments are marked reserved and are thus not properly accessible through the UIO API
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anymore. This change should be downwards compatible to older device trees.
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# [v6.5.1] 2023-09-12
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# [v6.5.1] 2023-09-12
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- Bumped `eive-tmtc` to v5.5.0.
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- Bumped `eive-tmtc` to v5.5.0.
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@ -53,23 +53,30 @@ ReturnValue_t PdecHandler::initialize() {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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ReturnValue_t result = returnvalue::OK;
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UioMapper regMapper(uioNames.registers);
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UioMapper regMapper(uioNames.registers);
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result = regMapper.getMappedAdress(®isterBaseAddress, UioMapper::Permissions::READ_WRITE);
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ReturnValue_t result =
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regMapper.getMappedAdress(®isterBaseAddress, UioMapper::Permissions::READ_WRITE);
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if (result != returnvalue::OK) {
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if (result != returnvalue::OK) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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UioMapper configMemMapper(uioNames.configMemory);
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result = configMemMapper.getMappedAdress(&memoryBaseAddress, UioMapper::Permissions::READ_WRITE);
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int fd = 0;
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if (result != returnvalue::OK) {
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if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) {
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sif::error << "PdecHandler::initialize: Opening /dev/mem failed" << std::endl;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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};
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memoryBaseAddress = static_cast<uint32_t*>(
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mmap(0, PDEC_CFG_MEM_SIZE, static_cast<int>(UioMapper::Permissions::READ_WRITE), MAP_SHARED,
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fd, PDEC_CFG_MEM_PHY_ADDR));
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if (memoryBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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} else {
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pdecConfig.setMemoryBaseAddress(memoryBaseAddress);
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}
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}
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UioMapper ramMapper(uioNames.ramMemory);
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pdecConfig.setMemoryBaseAddress(memoryBaseAddress);
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result = ramMapper.getMappedAdress(&ramBaseAddress, UioMapper::Permissions::READ_WRITE);
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if (result != returnvalue::OK) {
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ramBaseAddress = static_cast<uint32_t*>(mmap(0, PDEC_RAM_SIZE,
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static_cast<int>(UioMapper::Permissions::READ_WRITE),
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MAP_SHARED, fd, PDEC_RAM_PHY_ADDR));
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if (ramBaseAddress == nullptr) {
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return ObjectManagerIF::CHILD_INIT_FAILED;
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return ObjectManagerIF::CHILD_INIT_FAILED;
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}
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}
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@ -51,6 +51,10 @@ class PdecHandler : public SystemObject,
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public ReceivesParameterMessagesIF {
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public ReceivesParameterMessagesIF {
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public:
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public:
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
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static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000;
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static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
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static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000;
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enum class Modes { POLLED, IRQ };
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enum class Modes { POLLED, IRQ };
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