improvements from sus test
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2022-03-31 16:16:01 +02:00
parent f1fe115447
commit 413f552639
7 changed files with 21 additions and 22 deletions

View File

@ -44,6 +44,7 @@ debugging. */
#define OBSW_ADD_PLOC_SUPERVISOR 0
#define OBSW_ADD_PLOC_MPSOC 0
#define OBSW_ADD_SUN_SENSORS 1
#define OBSW_ADD_SUS_BOARD_ASS 1
#define OBSW_ADD_ACS_BOARD 1
#define OBSW_ADD_ACS_HANDLERS 1
#define OBSW_ADD_RW 0
@ -115,7 +116,6 @@ debugging. */
#define OBSW_ADD_UART_TEST_CODE 0
#define OBSW_TEST_ACS 0
#define OBSW_TEST_ACS_BOARD_ASS 0
#define OBSW_DEBUG_ACS 0
#define OBSW_TEST_SUS 0
#define OBSW_DEBUG_SUS 0

View File

@ -177,14 +177,7 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
bool addSus9 = true;
bool addSus10 = true;
bool addSus11 = true;
/**
* The sun sensor will be shutdown as soon as the chip select is pulled high. Thus all
* requests to a sun sensor must be performed consecutively. Another reason for calling multiple
* device handler cycles is that the ADC conversions take some time. Thus first the ADC
* conversions are initiated and in a next step the results can be read from the internal FIFO.
* One sun sensor communication sequence also blocks the SPI bus. So other devices can not be
* inserted between the device handler cycles of one SUS.
*/
if (addSus0) {
/* Write setup */
thisSequence->addSlot(objects::SUS_0, length * 0, DeviceHandlerIF::PERFORM_OPERATION);