modes for VC/stores
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@@ -19,7 +19,7 @@ PapbVcInterface::~PapbVcInterface() {}
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ReturnValue_t PapbVcInterface::initialize() {
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UioMapper uioMapper(uioFile, mapNum);
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ReturnValue_t result = uioMapper.getMappedAdress(const_cast<uint32_t**>(&vcBaseReg),
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UioMapper::Permissions::WRITE_ONLY);
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UioMapper::Permissions::WRITE_ONLY);
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if (result != returnvalue::OK) {
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return result;
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}
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@@ -38,7 +38,7 @@ ReturnValue_t PapbVcInterface::write(const uint8_t* data, size_t size) {
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// TODO: Maybe this should not be done like this. It would be better if there was a custom
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// FPGA module which can accept packets and then takes care of dumping that packet into
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// the PTME. DMA would be an ideal solution for this.
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nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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// nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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if (pollPapbBusySignal(2) == returnvalue::OK) {
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*(vcBaseReg + DATA_REG_OFFSET) = static_cast<uint32_t>(data[idx]);
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} else {
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@@ -46,7 +46,7 @@ ReturnValue_t PapbVcInterface::write(const uint8_t* data, size_t size) {
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return returnvalue::FAILED;
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}
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}
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nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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// nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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if (pollPapbBusySignal(2) == returnvalue::OK) {
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completePacketTransfer();
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} else {
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