eive/eive-obsw
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GPIO hal update
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This commit is contained in:
Robin Müller
2022-02-28 15:47:34 +01:00
parent 6b88c525b2
commit 54640147c1
6 changed files with 178 additions and 162 deletions
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22
bsp_q7s/callbacks/gpioCallbacks.cpp
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@ -12,6 +12,7 @@ namespace gpioCallbacks {
GpioIF* gpioComInterface;
void initSpiCsDecoder(GpioIF* gpioComIF) {
using namespace gpio;
ReturnValue_t result;
if (gpioComIF == nullptr) {
@ -26,29 +27,29 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
GpiodRegularByLineName* spiMuxBit = nullptr;
/** Setting mux bit 1 to low will disable IC21 on the interface board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_0_PIN, "SPI Mux Bit 1",
gpio::DIR_OUT, gpio::HIGH);
Direction::OUT, Levels::HIGH);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_0, spiMuxBit);
/** Setting mux bit 2 to low disables IC1 on the TCS board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 2",
gpio::DIR_OUT, gpio::HIGH);
Direction::OUT, Levels::HIGH);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 3",
gpio::DIR_OUT, gpio::LOW);
Direction::OUT, Levels::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
/** The following gpios can take arbitrary initial values */
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 4",
gpio::DIR_OUT, gpio::LOW);
Direction::OUT, Levels::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 5",
gpio::DIR_OUT, gpio::LOW);
Direction::OUT, Levels::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 6",
gpio::DIR_OUT, gpio::LOW);
Direction::OUT, Levels::LOW);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
GpiodRegularByLineName* enRwDecoder =
new GpiodRegularByLineName(q7s::gpioNames::EN_RW_CS, "EN_RW_CS", gpio::DIR_OUT, gpio::HIGH);
GpiodRegularByLineName* enRwDecoder = new GpiodRegularByLineName(
q7s::gpioNames::EN_RW_CS, "EN_RW_CS", Direction::OUT, Levels::HIGH);
spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
result = gpioComInterface->addGpios(spiMuxGpios);
@ -60,6 +61,7 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Levels value,
void* args) {
using namespace gpio;
if (gpioComInterface == nullptr) {
sif::debug << "spiCsDecoderCallback: No gpioComIF specified. Call initSpiCsDecoder "
<< "to specify gpioComIF" << std::endl;
@ -71,7 +73,7 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
return;
}
if (value == gpio::HIGH) {
if (value == Levels::HIGH) {
switch (gpioId) {
case (gpioIds::RTD_IC_3): {
disableDecoderTcsIc1();
@ -204,7 +206,7 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
default:
sif::debug << "spiCsDecoderCallback: Invalid gpio id " << gpioId << std::endl;
}
} else if (value == gpio::LOW) {
} else if (value == Levels::LOW) {
switch (gpioId) {
case (gpioIds::RTD_IC_3): {
selectY7();