eive/eive-obsw
eive/eive-obsw
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enabled rx lines of syrlinks rs485 transceiver chips

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This commit is contained in:
Jakob Meier 2021-11-21 13:59:18 +01:00
parent 67ac4060d7
commit 63965e2f68
3 changed files with 30 additions and 2 deletions
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3
bsp_q7s/boardconfig/busConf.h
View File

@ -66,7 +66,10 @@ namespace gpioNames {
static constexpr char PAPB_EMPTY_SIGNAL_VC3[] = "papb_empty_signal_vc3"; static constexpr char PAPB_EMPTY_SIGNAL_VC3[] = "papb_empty_signal_vc3";
static constexpr char RS485_EN_TX_CLOCK[] = "tx_clock_enable_ltc2872"; static constexpr char RS485_EN_TX_CLOCK[] = "tx_clock_enable_ltc2872";
static constexpr char RS485_EN_TX_DATA[] = "tx_data_enable_ltc2872"; static constexpr char RS485_EN_TX_DATA[] = "tx_data_enable_ltc2872";
static constexpr char RS485_EN_RX_CLOCK[] = "rx_clock_enable_ltc2872";
static constexpr char RS485_EN_RX_DATA[] = "rx_data_enable_ltc2872";
static constexpr char PDEC_RESET[] = "pdec_reset"; static constexpr char PDEC_RESET[] = "pdec_reset";
static constexpr char BIT_RATE_SEL[] = "bit_rate_sel";
} }
} }

23
bsp_q7s/core/ObjectFactory.cpp
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@ -79,6 +79,8 @@
#include <linux/obc/PdecHandler.h> #include <linux/obc/PdecHandler.h>
#include <linux/obc/PapbVcInterface.h> #include <linux/obc/PapbVcInterface.h>
#include <linux/obc/PtmeConfig.h> #include <linux/obc/PtmeConfig.h>
#include <linux/obc/PtmeRateSetter.h>
#include <linux/obc/TxRateSetterIF.h>
ResetArgs resetArgsGnss0; ResetArgs resetArgsGnss0;
ResetArgs resetArgsGnss1; ResetArgs resetArgsGnss1;
@ -937,8 +939,19 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF *gpioComIF) {
ptme->addVcInterface(ccsds::VC2, vc2); ptme->addVcInterface(ccsds::VC2, vc2);
ptme->addVcInterface(ccsds::VC3, vc3); ptme->addVcInterface(ccsds::VC3, vc3);
GpioCookie* gpioCookieRateSetter = new GpioCookie;
consumer.str("");
consumer << "ptme rate setter";
// Init to low -> default bit rate is low bit rate (200 kbps in downlink with syrlinks)
gpio = new GpiodRegularByLineName(q7s::gpioNames::BIT_RATE_SEL, consumer.str(), gpio::OUT,
gpio::LOW);
gpioCookieRateSetter->addGpio(gpioIds::BIT_RATE_SEL, gpio);
gpioComIF->addGpios(gpioCookieRateSetter);
TxRateSetterIF* txRateSetterIF = new PtmeRateSetter(gpioIds::BIT_RATE_SEL, gpioComIF);
CCSDSHandler* ccsdsHandler = new CCSDSHandler(objects::CCSDS_HANDLER, objects::PTME, CCSDSHandler* ccsdsHandler = new CCSDSHandler(objects::CCSDS_HANDLER, objects::PTME,
objects::CCSDS_PACKET_DISTRIBUTOR); objects::CCSDS_PACKET_DISTRIBUTOR, txRateSetterIF);
VirtualChannel* vc = nullptr; VirtualChannel* vc = nullptr;
vc = new VirtualChannel(ccsds::VC0, common::VC0_QUEUE_SIZE); vc = new VirtualChannel(ccsds::VC0, common::VC0_QUEUE_SIZE);
@ -973,6 +986,14 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF *gpioComIF) {
gpio::Direction::OUT, gpio::HIGH); gpio::Direction::OUT, gpio::HIGH);
gpioRS485Chip->addGpio(gpioIds::RS485_EN_TX_DATA, gpio); gpioRS485Chip->addGpio(gpioIds::RS485_EN_TX_DATA, gpio);
// Default configuration enables RX channels (RXEN = LOW)
gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_RX_CLOCK, "RS485 Transceiver",
gpio::Direction::OUT, gpio::LOW);
gpioRS485Chip->addGpio(gpioIds::RS485_EN_RX_CLOCK, gpio);
gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_RX_DATA, "RS485 Transceiver",
gpio::Direction::OUT, gpio::LOW);
gpioRS485Chip->addGpio(gpioIds::RS485_EN_RX_DATA, gpio);
gpioComIF->addGpios(gpioRS485Chip); gpioComIF->addGpios(gpioRS485Chip);
#endif /* BOARD_TE0720 == 0 */ #endif /* BOARD_TE0720 == 0 */
} }

6
linux/fsfwconfig/devices/gpioIds.h
View File

@ -104,7 +104,11 @@ enum gpioId_t {
RS485_EN_TX_DATA, RS485_EN_TX_DATA,
RS485_EN_TX_CLOCK RS485_EN_TX_CLOCK,
RS485_EN_RX_DATA,
RS485_EN_RX_CLOCK,
BIT_RATE_SEL
}; };
} }