Merge pull request 'add SW IF for manipulating poll threshold' (#550) from ptme_poll_threshold_register into develop
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Reviewed-on: #550
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commit
685a4caace
@ -16,6 +16,15 @@ will consitute of a breaking change warranting a new major release:
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# [unreleased]
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# [unreleased]
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## Fixed
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- PTME was not reset after configuration changes.
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## Changed
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- Poll threshold configuration of the PTME IP core is now configurable via a parameter command
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and is set to 0b010 (4 polls) instead of 0b001 (1 poll) per default.
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# [v1.42.0] 2023-04-01
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# [v1.42.0] 2023-04-01
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- eive-tmtc: v2.20.1
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- eive-tmtc: v2.20.1
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@ -1,5 +1,7 @@
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#include "AxiPtmeConfig.h"
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#include "AxiPtmeConfig.h"
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#include <fsfw/ipc/MutexGuard.h>
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#include "fsfw/serviceinterface/ServiceInterface.h"
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#include "fsfw/serviceinterface/ServiceInterface.h"
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#include "fsfw_hal/linux/uio/UioMapper.h"
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#include "fsfw_hal/linux/uio/UioMapper.h"
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@ -39,97 +41,60 @@ ReturnValue_t AxiPtmeConfig::writeCaduRateReg(uint8_t rateVal) {
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return returnvalue::OK;
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::enableTxclockManipulator() {
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void AxiPtmeConfig::enableTxclockManipulator() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, true, BitPos::EN_TX_CLK_MANIPULATOR);
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writeBit(COMMON_CONFIG_REG, true, BitPos::EN_TX_CLK_MANIPULATOR);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::disableTxclockManipulator() {
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void AxiPtmeConfig::disableTxclockManipulator() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, false, BitPos::EN_TX_CLK_MANIPULATOR);
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writeBit(COMMON_CONFIG_REG, false, BitPos::EN_TX_CLK_MANIPULATOR);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::enableTxclockInversion() {
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void AxiPtmeConfig::enableTxclockInversion() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, true, BitPos::INVERT_CLOCK);
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writeBit(COMMON_CONFIG_REG, true, BitPos::INVERT_CLOCK);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::disableTxclockInversion() {
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void AxiPtmeConfig::disableTxclockInversion() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, false, BitPos::INVERT_CLOCK);
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writeBit(COMMON_CONFIG_REG, false, BitPos::INVERT_CLOCK);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::enableBatPriorityBit() {
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void AxiPtmeConfig::enableBatPriorityBit() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, true, BitPos::EN_BAT_PRIORITY);
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writeBit(COMMON_CONFIG_REG, true, BitPos::EN_BAT_PRIORITY);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::disableBatPriorityBit() {
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void AxiPtmeConfig::disableBatPriorityBit() {
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ReturnValue_t result = writeBit(COMMON_CONFIG_REG, false, BitPos::EN_BAT_PRIORITY);
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writeBit(COMMON_CONFIG_REG, false, BitPos::EN_BAT_PRIORITY);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::writeReg(uint32_t regOffset, uint32_t writeVal) {
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void AxiPtmeConfig::writeReg(uint32_t regOffset, uint32_t writeVal) {
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ReturnValue_t result = returnvalue::OK;
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MutexGuard mg(mutex, timeoutType, mutexTimeout);
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result = mutex->lockMutex(timeoutType, mutexTimeout);
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if (result != returnvalue::OK) {
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sif::warning << "AxiPtmeConfig::readReg: Failed to lock mutex" << std::endl;
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return returnvalue::FAILED;
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}
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*(baseAddress + regOffset / ADRESS_DIVIDER) = writeVal;
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*(baseAddress + regOffset / ADRESS_DIVIDER) = writeVal;
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result = mutex->unlockMutex();
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if (result != returnvalue::OK) {
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sif::warning << "AxiPtmeConfig::readReg: Failed to unlock mutex" << std::endl;
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return returnvalue::FAILED;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::readReg(uint32_t regOffset, uint32_t* readVal) {
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uint32_t AxiPtmeConfig::readReg(uint32_t regOffset) {
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ReturnValue_t result = returnvalue::OK;
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MutexGuard mg(mutex, timeoutType, mutexTimeout);
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result = mutex->lockMutex(timeoutType, mutexTimeout);
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return *(baseAddress + regOffset / ADRESS_DIVIDER);
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if (result != returnvalue::OK) {
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sif::warning << "AxiPtmeConfig::readReg: Failed to lock mutex" << std::endl;
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return returnvalue::FAILED;
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}
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*readVal = *(baseAddress + regOffset / ADRESS_DIVIDER);
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result = mutex->unlockMutex();
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if (result != returnvalue::OK) {
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sif::warning << "AxiPtmeConfig::readReg: Failed to unlock mutex" << std::endl;
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return returnvalue::FAILED;
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}
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return returnvalue::OK;
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}
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}
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ReturnValue_t AxiPtmeConfig::writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos) {
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void AxiPtmeConfig::writePollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold) {
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uint32_t readVal = 0;
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MutexGuard mg(mutex, timeoutType, mutexTimeout);
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ReturnValue_t result = readReg(regOffset, &readVal);
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uint32_t regVal = readCommonCfgReg();
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if (result != returnvalue::OK) {
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// Clear bits first
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return result;
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regVal &= ~(0b111 << 3);
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}
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regVal |= (static_cast<uint8_t>(pollThreshold) << 3);
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writeCommonCfgReg(regVal);
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}
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AxiPtmeConfig::IdlePollThreshold AxiPtmeConfig::readPollThreshold() {
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uint32_t regVal = readCommonCfgReg();
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return static_cast<AxiPtmeConfig::IdlePollThreshold>((regVal >> 3) & 0b111);
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}
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void AxiPtmeConfig::writeCommonCfgReg(uint32_t value) { writeReg(COMMON_CONFIG_REG, value); }
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uint32_t AxiPtmeConfig::readCommonCfgReg() { return readReg(COMMON_CONFIG_REG); }
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void AxiPtmeConfig::writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos) {
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uint32_t readVal = readReg(regOffset);
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uint32_t writeVal =
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uint32_t writeVal =
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(readVal & ~(1 << static_cast<uint32_t>(bitPos))) | bitVal << static_cast<uint32_t>(bitPos);
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(readVal & ~(1 << static_cast<uint32_t>(bitPos))) | bitVal << static_cast<uint32_t>(bitPos);
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result = writeReg(regOffset, writeVal);
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writeReg(regOffset, writeVal);
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if (result != returnvalue::OK) {
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return result;
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}
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return returnvalue::OK;
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}
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}
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@ -14,6 +14,16 @@
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*/
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*/
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class AxiPtmeConfig : public SystemObject {
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class AxiPtmeConfig : public SystemObject {
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public:
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public:
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enum IdlePollThreshold : uint8_t {
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ALWAYS = 0b000,
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POLL_1 = 0b001,
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POLL_4 = 0b010,
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POLL_16 = 0b011,
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POLL_64 = 0b100,
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POLL_256 = 0b101,
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POLL_1024 = 0b110,
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NEVER = 0b111
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};
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/**
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/**
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* @brief Constructor
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* @brief Constructor
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* @param axiUio Device file of UIO belonging to the AXI configuration interface.
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* @param axiUio Device file of UIO belonging to the AXI configuration interface.
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@ -40,8 +50,8 @@ class AxiPtmeConfig : public SystemObject {
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* Default: Enables TX clock manipulator
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* Default: Enables TX clock manipulator
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*
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*
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*/
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*/
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ReturnValue_t enableTxclockManipulator();
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void enableTxclockManipulator();
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ReturnValue_t disableTxclockManipulator();
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void disableTxclockManipulator();
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/**
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/**
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* @brief The next to functions control whether data will be updated on the rising or falling edge
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* @brief The next to functions control whether data will be updated on the rising or falling edge
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@ -51,11 +61,14 @@ class AxiPtmeConfig : public SystemObject {
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* Disable clock inversion. Data updated on rising edge.
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* Disable clock inversion. Data updated on rising edge.
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* Default: Inversion is disabled
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* Default: Inversion is disabled
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*/
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*/
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ReturnValue_t enableTxclockInversion();
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void enableTxclockInversion();
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ReturnValue_t disableTxclockInversion();
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void disableTxclockInversion();
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ReturnValue_t enableBatPriorityBit();
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void enableBatPriorityBit();
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ReturnValue_t disableBatPriorityBit();
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void disableBatPriorityBit();
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void writePollThreshold(IdlePollThreshold pollThreshold);
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IdlePollThreshold readPollThreshold();
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private:
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private:
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// Address of register storing the bitrate configuration parameter
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// Address of register storing the bitrate configuration parameter
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@ -80,7 +93,7 @@ class AxiPtmeConfig : public SystemObject {
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*
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*
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* @param writeVal Value to write
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* @param writeVal Value to write
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*/
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*/
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ReturnValue_t writeReg(uint32_t regOffset, uint32_t writeVal);
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void writeReg(uint32_t regOffset, uint32_t writeVal);
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/**
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/**
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* @brief Reads value from configuration register
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* @brief Reads value from configuration register
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@ -88,7 +101,10 @@ class AxiPtmeConfig : public SystemObject {
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* @param regOffset Offset of register from base address to read from
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* @param regOffset Offset of register from base address to read from
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* Qparam readVal Pointer to variable where read value will be written to
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* Qparam readVal Pointer to variable where read value will be written to
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*/
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*/
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ReturnValue_t readReg(uint32_t regOffset, uint32_t* readVal);
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uint32_t readReg(uint32_t regOffset);
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uint32_t readCommonCfgReg();
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void writeCommonCfgReg(uint32_t value);
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/**
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/**
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* @brief Sets one bit in a register
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* @brief Sets one bit in a register
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@ -99,7 +115,7 @@ class AxiPtmeConfig : public SystemObject {
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*
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*
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* @return returnvalue::OK if successful, otherwise returnvalue::FAILED
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* @return returnvalue::OK if successful, otherwise returnvalue::FAILED
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*/
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*/
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ReturnValue_t writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos);
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void writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos);
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};
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};
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#endif /* LINUX_OBC_AXIPTMECONFIG_H_ */
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#endif /* LINUX_OBC_AXIPTMECONFIG_H_ */
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@ -26,33 +26,30 @@ ReturnValue_t PtmeConfig::setRate(uint32_t bitRate) {
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return axiPtmeConfig->writeCaduRateReg(static_cast<uint8_t>(rateVal));
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return axiPtmeConfig->writeCaduRateReg(static_cast<uint8_t>(rateVal));
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}
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}
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ReturnValue_t PtmeConfig::invertTxClock(bool invert) {
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void PtmeConfig::invertTxClock(bool invert) {
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ReturnValue_t result = returnvalue::OK;
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if (invert) {
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if (invert) {
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result = axiPtmeConfig->enableTxclockInversion();
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axiPtmeConfig->enableTxclockInversion();
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} else {
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} else {
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result = axiPtmeConfig->disableTxclockInversion();
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axiPtmeConfig->disableTxclockInversion();
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}
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}
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if (result != returnvalue::OK) {
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return CLK_INVERSION_FAILED;
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}
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return result;
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}
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}
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ReturnValue_t PtmeConfig::configTxManipulator(bool enable) {
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void PtmeConfig::configTxManipulator(bool enable) {
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ReturnValue_t result = returnvalue::OK;
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if (enable) {
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if (enable) {
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result = axiPtmeConfig->enableTxclockManipulator();
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axiPtmeConfig->enableTxclockManipulator();
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} else {
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} else {
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result = axiPtmeConfig->disableTxclockManipulator();
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axiPtmeConfig->disableTxclockManipulator();
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}
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}
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return result;
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}
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}
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ReturnValue_t PtmeConfig::enableBatPriorityBit(bool enable) {
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void PtmeConfig::enableBatPriorityBit(bool enable) {
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if (enable) {
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if (enable) {
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return axiPtmeConfig->enableBatPriorityBit();
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axiPtmeConfig->enableBatPriorityBit();
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} else {
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} else {
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return axiPtmeConfig->disableBatPriorityBit();
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axiPtmeConfig->disableBatPriorityBit();
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}
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}
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}
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}
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void PtmeConfig::setPollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold) {
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axiPtmeConfig->writePollThreshold(pollThreshold);
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}
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@ -43,7 +43,7 @@ class PtmeConfig : public SystemObject {
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*
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*
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* @return REUTRN_OK if successful, otherwise error return value
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* @return REUTRN_OK if successful, otherwise error return value
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*/
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*/
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ReturnValue_t invertTxClock(bool invert);
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void invertTxClock(bool invert);
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/**
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/**
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* @brief Controls the tx clock manipulator of the PTME wrapper component
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* @brief Controls the tx clock manipulator of the PTME wrapper component
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@ -53,7 +53,7 @@ class PtmeConfig : public SystemObject {
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*
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*
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* @return REUTRN_OK if successful, otherwise error return value
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* @return REUTRN_OK if successful, otherwise error return value
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*/
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*/
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ReturnValue_t configTxManipulator(bool enable);
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void configTxManipulator(bool enable);
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/**
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/**
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* Enable the bat priority bit in the PTME wrapper component.
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* Enable the bat priority bit in the PTME wrapper component.
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@ -62,7 +62,9 @@ class PtmeConfig : public SystemObject {
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* @param enable
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* @param enable
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* @return
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* @return
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*/
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*/
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ReturnValue_t enableBatPriorityBit(bool enable);
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void enableBatPriorityBit(bool enable);
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void setPollThreshold(AxiPtmeConfig::IdlePollThreshold pollThreshold);
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private:
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private:
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static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;
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static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;
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@ -75,11 +75,9 @@ ReturnValue_t CcsdsIpCoreHandler::initialize() {
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}
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}
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// This also pulls the PTME out of reset state.
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// This also pulls the PTME out of reset state.
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if (batPriorityParam == 0) {
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updateBatPriorityFromParam();
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disablePrioritySelectMode();
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ptmeConfig.setPollThreshold(
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} else {
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static_cast<AxiPtmeConfig::IdlePollThreshold>(params.pollThresholdParam));
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enablePrioritySelectMode();
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}
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resetPtme();
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resetPtme();
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ptmeLocked = false;
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ptmeLocked = false;
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@ -123,7 +121,10 @@ ReturnValue_t CcsdsIpCoreHandler::getParameter(uint8_t domainId, uint8_t uniqueI
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ParameterWrapper* parameterWrapper,
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ParameterWrapper* parameterWrapper,
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const ParameterWrapper* newValues,
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const ParameterWrapper* newValues,
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uint16_t startAtIndex) {
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uint16_t startAtIndex) {
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if ((domainId == 0) and (uniqueIdentifier == ParamId::BAT_PRIORITY)) {
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if (domainId != 0) {
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return HasParametersIF::INVALID_DOMAIN_ID;
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}
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if (uniqueIdentifier == ParamId::BAT_PRIORITY) {
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uint8_t newVal = 0;
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uint8_t newVal = 0;
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ReturnValue_t result = newValues->getElement(&newVal);
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ReturnValue_t result = newValues->getElement(&newVal);
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||||||
if (result != returnvalue::OK) {
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if (result != returnvalue::OK) {
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@ -132,8 +133,8 @@ ReturnValue_t CcsdsIpCoreHandler::getParameter(uint8_t domainId, uint8_t uniqueI
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if (newVal > 1) {
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if (newVal > 1) {
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return HasParametersIF::INVALID_VALUE;
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return HasParametersIF::INVALID_VALUE;
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}
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}
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parameterWrapper->set(batPriorityParam);
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parameterWrapper->set(params.batPriorityParam);
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if (newVal != batPriorityParam) {
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if (newVal != params.batPriorityParam) {
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// This ensures that the BAT priority is updated at some point when an update of the PTME is
|
// This ensures that the BAT priority is updated at some point when an update of the PTME is
|
||||||
// allowed
|
// allowed
|
||||||
updateContext.updateBatPrio = true;
|
updateContext.updateBatPrio = true;
|
||||||
@ -144,6 +145,23 @@ ReturnValue_t CcsdsIpCoreHandler::getParameter(uint8_t domainId, uint8_t uniqueI
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
return returnvalue::OK;
|
return returnvalue::OK;
|
||||||
|
} else if (uniqueIdentifier == ParamId::POLL_THRESHOLD) {
|
||||||
|
uint8_t newVal = 0;
|
||||||
|
ReturnValue_t result = newValues->getElement(&newVal);
|
||||||
|
if (result != returnvalue::OK) {
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
if (newVal > static_cast<uint8_t>(AxiPtmeConfig::NEVER)) {
|
||||||
|
return HasParametersIF::INVALID_VALUE;
|
||||||
|
}
|
||||||
|
parameterWrapper->set(newVal);
|
||||||
|
if (newVal != params.pollThresholdParam) {
|
||||||
|
updateContext.updatePollThreshold = true;
|
||||||
|
if (mode == MODE_OFF) {
|
||||||
|
initPtmeUpdateAfterXCycles();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return returnvalue::OK;
|
||||||
}
|
}
|
||||||
return HasParametersIF::INVALID_IDENTIFIER_ID;
|
return HasParametersIF::INVALID_IDENTIFIER_ID;
|
||||||
}
|
}
|
||||||
@ -161,24 +179,31 @@ ReturnValue_t CcsdsIpCoreHandler::executeAction(ActionId_t actionId, MessageQueu
|
|||||||
switch (actionId) {
|
switch (actionId) {
|
||||||
case ARBITRARY_RATE: {
|
case ARBITRARY_RATE: {
|
||||||
uint32_t bitrate = 0;
|
uint32_t bitrate = 0;
|
||||||
SerializeAdapter::deSerialize(&bitrate, &data, &size, SerializeIF::Endianness::BIG);
|
result = SerializeAdapter::deSerialize(&bitrate, &data, &size, SerializeIF::Endianness::BIG);
|
||||||
result = ptmeConfig.setRate(bitrate);
|
if (result != returnvalue::OK) {
|
||||||
|
return result;
|
||||||
|
}
|
||||||
|
ptmeConfig.setRate(bitrate);
|
||||||
|
updateContext.updateClockRate = true;
|
||||||
|
if (mode == MODE_OFF) {
|
||||||
|
initPtmeUpdateAfterXCycles();
|
||||||
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case ENABLE_TX_CLK_MANIPULATOR: {
|
case ENABLE_TX_CLK_MANIPULATOR: {
|
||||||
result = ptmeConfig.configTxManipulator(true);
|
ptmeConfig.configTxManipulator(true);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case DISABLE_TX_CLK_MANIPULATOR: {
|
case DISABLE_TX_CLK_MANIPULATOR: {
|
||||||
result = ptmeConfig.configTxManipulator(false);
|
ptmeConfig.configTxManipulator(false);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case UPDATE_ON_RISING_EDGE: {
|
case UPDATE_ON_RISING_EDGE: {
|
||||||
result = ptmeConfig.invertTxClock(false);
|
ptmeConfig.invertTxClock(false);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case UPDATE_ON_FALLING_EDGE: {
|
case UPDATE_ON_FALLING_EDGE: {
|
||||||
result = ptmeConfig.invertTxClock(true);
|
ptmeConfig.invertTxClock(true);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
@ -271,7 +296,7 @@ void CcsdsIpCoreHandler::enablePrioritySelectMode() { ptmeConfig.enableBatPriori
|
|||||||
void CcsdsIpCoreHandler::disablePrioritySelectMode() { ptmeConfig.enableBatPriorityBit(false); }
|
void CcsdsIpCoreHandler::disablePrioritySelectMode() { ptmeConfig.enableBatPriorityBit(false); }
|
||||||
|
|
||||||
void CcsdsIpCoreHandler::updateBatPriorityFromParam() {
|
void CcsdsIpCoreHandler::updateBatPriorityFromParam() {
|
||||||
if (batPriorityParam == 0) {
|
if (params.batPriorityParam == 0) {
|
||||||
disablePrioritySelectMode();
|
disablePrioritySelectMode();
|
||||||
} else {
|
} else {
|
||||||
enablePrioritySelectMode();
|
enablePrioritySelectMode();
|
||||||
@ -290,9 +315,17 @@ void CcsdsIpCoreHandler::performPtmeUpdateWhenApplicable() {
|
|||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (updateContext.ptmeUpdateCycleCount >= 2) {
|
if (updateContext.ptmeUpdateCycleCount >= 2) {
|
||||||
|
bool doResetPtme = false;
|
||||||
if (updateContext.updateBatPrio) {
|
if (updateContext.updateBatPrio) {
|
||||||
updateBatPriorityFromParam();
|
updateBatPriorityFromParam();
|
||||||
updateContext.updateBatPrio = false;
|
updateContext.updateBatPrio = false;
|
||||||
|
doResetPtme = true;
|
||||||
|
}
|
||||||
|
if (updateContext.updatePollThreshold) {
|
||||||
|
ptmeConfig.setPollThreshold(
|
||||||
|
static_cast<AxiPtmeConfig::IdlePollThreshold>(params.pollThresholdParam));
|
||||||
|
updateContext.updatePollThreshold = false;
|
||||||
|
doResetPtme = true;
|
||||||
}
|
}
|
||||||
ReturnValue_t result = returnvalue::OK;
|
ReturnValue_t result = returnvalue::OK;
|
||||||
if (updateContext.updateClockRate) {
|
if (updateContext.updateClockRate) {
|
||||||
@ -312,10 +345,7 @@ void CcsdsIpCoreHandler::performPtmeUpdateWhenApplicable() {
|
|||||||
sif::error << "CcsdsIpCoreHandler: Setting datarate failed" << std::endl;
|
sif::error << "CcsdsIpCoreHandler: Setting datarate failed" << std::endl;
|
||||||
}
|
}
|
||||||
updateContext.updateClockRate = false;
|
updateContext.updateClockRate = false;
|
||||||
}
|
doResetPtme = true;
|
||||||
bool doResetPtme = true;
|
|
||||||
if (not updateContext.updateBatPrio and not updateContext.updateClockRate) {
|
|
||||||
doResetPtme = false;
|
|
||||||
}
|
}
|
||||||
finishPtmeUpdateAfterXCycles(doResetPtme);
|
finishPtmeUpdateAfterXCycles(doResetPtme);
|
||||||
return;
|
return;
|
||||||
|
@ -60,7 +60,7 @@ class CcsdsIpCoreHandler : public SystemObject,
|
|||||||
public ReceivesParameterMessagesIF,
|
public ReceivesParameterMessagesIF,
|
||||||
public HasActionsIF {
|
public HasActionsIF {
|
||||||
public:
|
public:
|
||||||
enum ParamId : uint8_t { BAT_PRIORITY = 0 };
|
enum ParamId : uint8_t { BAT_PRIORITY = 0, POLL_THRESHOLD = 1 };
|
||||||
|
|
||||||
static const bool LINK_UP = true;
|
static const bool LINK_UP = true;
|
||||||
static const bool LINK_DOWN = false;
|
static const bool LINK_DOWN = false;
|
||||||
@ -156,12 +156,17 @@ class CcsdsIpCoreHandler : public SystemObject,
|
|||||||
|
|
||||||
PtmeConfig& ptmeConfig;
|
PtmeConfig& ptmeConfig;
|
||||||
PtmeGpios ptmeGpios;
|
PtmeGpios ptmeGpios;
|
||||||
// BAT priority bit on by default to enable priority selection mode for the PTME.
|
struct Parameters {
|
||||||
uint8_t batPriorityParam = 0;
|
// BAT priority bit on by default to enable priority selection mode for the PTME.
|
||||||
|
uint8_t batPriorityParam = 0;
|
||||||
|
uint8_t pollThresholdParam = static_cast<uint8_t>(AxiPtmeConfig::IdlePollThreshold::POLL_4);
|
||||||
|
|
||||||
|
} params;
|
||||||
|
|
||||||
struct UpdateContext {
|
struct UpdateContext {
|
||||||
bool updateBatPrio = false;
|
bool updateBatPrio = false;
|
||||||
bool updateClockRate = false;
|
bool updateClockRate = false;
|
||||||
|
bool updatePollThreshold = false;
|
||||||
bool enableTransmitAfterPtmeUpdate = false;
|
bool enableTransmitAfterPtmeUpdate = false;
|
||||||
uint8_t ptmeUpdateCycleCount = 0;
|
uint8_t ptmeUpdateCycleCount = 0;
|
||||||
bool performPtmeUpdateAfterXCycles = false;
|
bool performPtmeUpdateAfterXCycles = false;
|
||||||
|
Loading…
Reference in New Issue
Block a user