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pdec handler print tc
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This commit is contained in:
Jakob Meier
2021-11-03 18:19:36 +01:00
parent 3e2f4e7a10
commit 709661ff67
6 changed files with 132 additions and 43 deletions
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117
linux/obc/PdecHandler.cpp
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@ -1,4 +1,5 @@
#include <cstring>
#include <sstream>
#include <sys/mman.h>
#include <fcntl.h>
@ -10,10 +11,11 @@
#include "fsfw/objectmanager/ObjectManager.h"
PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId,
LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioMemory,
std::string uioRegisters) :
LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, std::string uioConfigMemory,
std::string uioRamMemory, std::string uioRegisters) :
SystemObject(objectId), tcDestinationId(tcDestinationId), gpioComIF(gpioComIF), pdecReset(
pdecReset), uioMemory(uioMemory), uioRegisters(uioRegisters) {
pdecReset), uioConfigMemory(uioConfigMemory), uioRamMemory(uioRamMemory), uioRegisters(
uioRegisters) {
}
@ -43,7 +45,12 @@ ReturnValue_t PdecHandler::initialize() {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
result = getMemoryBaseAddress();
result = getConfigMemoryBaseAddress();
if (result != RETURN_OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
result = getRamBaseAddress();
if (result != RETURN_OK) {
return ObjectManagerIF::CHILD_INIT_FAILED;
}
@ -76,45 +83,62 @@ ReturnValue_t PdecHandler::getRegisterAddress() {
return RETURN_OK;
}
ReturnValue_t PdecHandler::getMemoryBaseAddress() {
int fd = open(uioMemory.c_str(), O_RDWR);
ReturnValue_t PdecHandler::getConfigMemoryBaseAddress() {
int fd = open(uioConfigMemory.c_str(), O_RDWR);
if (fd < 1) {
sif::warning << "PdecHandler::getMemoryBaseAddress: Invalid UIO device file" << std::endl;
sif::warning << "PdecHandler::getConfigMemoryBaseAddress: Invalid UIO device file" << std::endl;
return RETURN_FAILED;
}
memoryBaseAddress = static_cast<uint32_t*>(mmap(NULL, MEMORY_MAP_SIZE, PROT_WRITE | PROT_READ,
memoryBaseAddress = static_cast<uint32_t*>(mmap(NULL, CONFIG_MEMORY_MAP_SIZE, PROT_WRITE | PROT_READ,
MAP_SHARED, fd, 0));
if (memoryBaseAddress == MAP_FAILED) {
sif::error << "PdecHandler::getMemoryBaseAddress: Failed to map uio address" << std::endl;
sif::error << "PdecHandler::getConfigMemoryBaseAddress: Failed to map uio address" << std::endl;
return RETURN_FAILED;
}
return RETURN_OK;
}
ReturnValue_t PdecHandler::getRamBaseAddress() {
int fd = open(uioRamMemory.c_str(), O_RDWR);
ramBaseAddress = static_cast<uint32_t*>(mmap(NULL, RAM_MAP_SIZE, PROT_WRITE | PROT_READ,
MAP_SHARED, fd, 0));
if (ramBaseAddress == MAP_FAILED) {
sif::error << "PdecHandler::getRamBaseAddress: Failed to map RAM base address" << std::endl;
return RETURN_FAILED;
}
return RETURN_OK;
}
void PdecHandler::writePdecConfig() {
PdecConfig pdecConfig;
*memoryBaseAddress = pdecConfig.getConfigWord(0);
*(memoryBaseAddress + 1) = pdecConfig.getConfigWord(1);
*(memoryBaseAddress + FRAME_HEADER_OFFSET)= pdecConfig.getConfigWord(0);
*(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
// uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
// Configure all MAP IDs as invalid
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) = NO_DESTINATION << 24
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx + 1 / 4) = NO_DESTINATION << 24
| NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
// *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) = routeToPm << 24
// | routeToPm << 16 | routeToPm << 8 | routeToPm;
}
// All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
*(memoryBaseAddress + 1) = NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) = (NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8)
| routeToPm;
// Write map id clock frequencies
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
*(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) = MAP_CLK_FREQ << 24
| MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
}
}
ReturnValue_t PdecHandler::resetFarStatFlag() {
@ -173,9 +197,6 @@ ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
bool PdecHandler::newTcReceived() {
uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
sif::debug << "PdecHandler::newTcReceived: pdecFar 0x" << std::hex
<< static_cast<unsigned int>(pdecFar) << std::endl;
if (pdecFar >> STAT_POSITION != NEW_FAR_RECEIVED) {
return false;
}
@ -303,11 +324,12 @@ void PdecHandler::handleNewTc() {
if (result != RETURN_OK) {
return;
}
#if OBSW_DEBUG_PDEC == 1
#if OBSW_DEBUG_PDEC_HANDLER == 1
unsigned int mapId = tcSegment[0] & MAP_ID_MASK;
sif::debug << "PdecHandler::handleNewTc: Received TC segment with map ID" << mapId
<< std::endl;
#endif /* OBSW_DEBUG_PDEC */
printTC(tcLength);
#endif /* OBSW_DEBUG_PDEC_HANDLER */
store_address_t storeId;
result = tcStore->addData(&storeId, tcSegment + 1, tcLength - 1);
@ -331,18 +353,17 @@ void PdecHandler::handleNewTc() {
}
ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
uint32_t tcOffset = *(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_BASE_ADDRESS;
uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4;
#if OBSW_DEBUG_PDEC == 1
sif::debug << "PdecHandler::readTc: TC offset: " << std::hex << tcOffset << std::endl;
#endif /* OBSW_DEBUG_PDEC */
#if OBSW_DEBUG_PDEC_HANDLER == 1
sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl;
#endif /* OBSW_DEBUG_PDEC_HANDLER */
uint32_t* tcPtr = reinterpret_cast<uint32_t*>(*(registerBaseAddress + tcOffset) / 4);
tcLength = *(registerBaseAddress + PDEC_SLEN_OFFSET);
#if OBSW_DEBUG_PDEC == 1
sif::debug << "PdecHandler::readTc: TC length: " << tcLength << std::endl;
#endif /* OBSW_DEBUG_PDEC */
#if OBSW_DEBUG_PDEC_HANDLER == 1
sif::debug << "PdecHandler::readTc: TC segment length: " << std::dec << tcLength << std::endl;
#endif /* OBSW_DEBUG_PDEC_HANDLER */
if (tcLength > MAX_TC_SEGMENT_SIZE) {
sif::warning << "PdecHandler::handleNewTc: Read invalid TC length from PDEC register"
@ -352,9 +373,31 @@ ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
uint32_t idx = 0;
uint32_t tcData = 0;
for (idx = 0; idx < tcLength; idx = idx + 4) {
tcData = *(tcPtr + idx);
std::memcpy(tcSegment + idx, &tcData, sizeof(tcData));
for (idx = 0; idx <= tcLength; idx = idx + 4) {
tcData = *(ramBaseAddress + tcOffset + idx / 4);
if (idx == 0) {
tcSegment[idx] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
tcSegment[idx + 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
tcSegment[idx + 2] = static_cast<uint8_t>(tcData & 0xFF);
}
else if (tcLength - idx + 1 == 3) {
tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
tcSegment[idx] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
tcSegment[idx + 1] = static_cast<uint8_t>(tcData & 0xFF);
}
else if (tcLength - idx + 1 == 2) {
tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
tcSegment[idx + 1] = static_cast<uint8_t>(tcData & 0xFF);
}
else if (tcLength - idx + 1 == 1) {
tcSegment[idx - 1] = static_cast<uint8_t>(tcData & 0xFF);
}
else {
tcSegment[idx - 1] = static_cast<uint8_t>((tcData >> 24) & 0xFF);
tcSegment[idx] = static_cast<uint8_t>((tcData >> 16) & 0xFF);
tcSegment[idx + 1] = static_cast<uint8_t>((tcData >> 8) & 0xFF);
tcSegment[idx + 2] = static_cast<uint8_t>(tcData & 0xFF);
}
}
// Backend buffer is handled back to PDEC3
@ -363,6 +406,16 @@ ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) {
return RETURN_OK;
}
void PdecHandler::printTC(uint32_t tcLength) {
std::stringstream tcSegmentStream;
tcSegmentStream << "TC segment data: 0x";
for (uint32_t idx = 0; idx < tcLength; idx++) {
tcSegmentStream << std::setfill('0') << std::setw(2) << std::hex
<< static_cast<unsigned int>(tcSegment[idx]);
}
sif::debug << tcSegmentStream.str() << std::endl;
}
uint8_t PdecHandler::calcMapAddrEntry(uint8_t moduleId) {
uint8_t lutEntry = 0;
uint8_t parity = getOddParity(moduleId | (1 << VALID_POSITION));