eive/eive-obsw
eive/eive-obsw
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This commit is contained in:
Robin Müller 2023-03-02 15:05:12 +01:00
parent 7e33ec16e4
commit 718a440442
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GPG Key ID: 11D4952C8CCEF814
7 changed files with 160 additions and 88 deletions
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4
CHANGELOG.md
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@ -27,6 +27,10 @@ will consitute of a breaking change warranting a new major release:
- IMTQ: Sets were filled with wrong data, e.g. Raw MTM was filled with calibrated MTM measurements. - IMTQ: Sets were filled with wrong data, e.g. Raw MTM was filled with calibrated MTM measurements.
- Set RM3100 dataset to valid. - Set RM3100 dataset to valid.
## Added
- Added Syrlinks Assembly object to allow recovery handling and to fix faulty FDIR behaviour.
# [v1.33.0] # [v1.33.0]
eive-tmtc: v2.16.2 eive-tmtc: v2.16.2

4
bsp_q7s/memory/LocalParameterHandler.h
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@ -19,8 +19,8 @@ class LocalParameterHandler : public NVMParameterBase {
* @brief Constructor * @brief Constructor
* *
* @param sdRelativeName Absolute name of json file relative to mount * @param sdRelativeName Absolute name of json file relative to mount
* directory of SD card. * directory of SD
* E.g. conf/example.json * card. E.g. conf/example.json
* @param sdcMan Pointer to SD card manager * @param sdcMan Pointer to SD card manager
*/ */
LocalParameterHandler(std::string sdRelativeName, SdCardMountedIF* sdcMan); LocalParameterHandler(std::string sdRelativeName, SdCardMountedIF* sdcMan);

2
common/config/eive/definitions.h
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@ -83,7 +83,7 @@ static constexpr float SCHED_BLOCK_7_PERIOD = static_cast<float>(SCHED_BLOCK_7_R
static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0; static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0; static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
} // namespace acs } // namespace spiSched
} // namespace config } // namespace config

224
mission/core/pollingSeqTables.cpp
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@ -251,53 +251,77 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
DeviceHandlerIF::GET_WRITE); DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF, thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF, thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB, thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB, thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB, thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB, thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF, thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF, thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF, thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF, thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB, thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB, thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF, thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF, thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB, thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB, thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB, thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB, thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF, thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF, thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF, thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF, thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB, thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB, thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_1_PERIOD,
DeviceHandlerIF::GET_READ);
} }
if (cfg.scheduleStr) { if (cfg.scheduleStr) {
@ -313,15 +337,20 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
if (cfg.scheduleAcsBoard) { if (cfg.scheduleAcsBoard) {
if (enableAside) { if (enableAside) {
// A side // A side
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION); DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE); DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ); DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
@ -331,23 +360,31 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE); length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
} }
if (enableBside) { if (enableBside) {
// B side // B side
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION); DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD, thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE); DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ); DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
@ -357,11 +394,14 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE); length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ); length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER, thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ); length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
} }
if (enableAside) { if (enableAside) {
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER, thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
@ -371,21 +411,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER, thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE); length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE); DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ); DeviceHandlerIF::GET_READ);
} }
if (enableBside) { if (enableBside) {
@ -396,21 +444,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
length * config::spiSched::SCHED_BLOCK_2_PERIOD, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER, thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE); length * config::spiSched::SCHED_BLOCK_2_PERIOD,
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE); DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD, thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
DeviceHandlerIF::GET_READ); DeviceHandlerIF::GET_READ);
} }
} }
@ -429,7 +485,8 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
imtq::ComStep::READ_MEASURE_GET); imtq::ComStep::READ_MEASURE_GET);
} }
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD, 0); thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD,
0);
if (cfg.scheduleImtq) { if (cfg.scheduleImtq) {
// This is the torquing cycle. // This is the torquing cycle.
@ -491,23 +548,34 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
DeviceHandlerIF::GET_READ); DeviceHandlerIF::GET_READ);
} }
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD, 0); thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD,
0);
#if OBSW_ADD_PL_PCDU == 1 #if OBSW_ADD_PL_PCDU == 1
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::PERFORM_OPERATION); thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_WRITE); thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_READ); thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
DeviceHandlerIF::GET_READ);
#endif #endif
#if OBSW_ADD_RAD_SENSORS == 1 #if OBSW_ADD_RAD_SENSORS == 1
/* Radiation sensor */ /* Radiation sensor */
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::PERFORM_OPERATION); thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_WRITE); DeviceHandlerIF::PERFORM_OPERATION);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_WRITE); thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_READ); DeviceHandlerIF::SEND_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_READ); thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::GET_WRITE);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::SEND_READ);
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
DeviceHandlerIF::GET_READ);
#endif #endif
return returnvalue::OK; return returnvalue::OK;
} }

2
mission/devices/ImtqHandler.cpp
View File

@ -849,7 +849,7 @@ void ImtqHandler::fillCalibratedMtmDataset(const uint8_t* packet) {
void ImtqHandler::fillRawMtmDataset(imtq::RawMtmMeasurementSet& set, const uint8_t* packet) { void ImtqHandler::fillRawMtmDataset(imtq::RawMtmMeasurementSet& set, const uint8_t* packet) {
PoolReadGuard rg(&set); PoolReadGuard rg(&set);
if(rg.getReadResult() != returnvalue::OK) { if (rg.getReadResult() != returnvalue::OK) {
sif::error << "ImtqHandler::fillRawMtmDataset: Lock failure" << std::endl; sif::error << "ImtqHandler::fillRawMtmDataset: Lock failure" << std::endl;
} }
unsigned int offset = 2; unsigned int offset = 2;

2
mission/system/fdir/SyrlinksFdir.cpp
View File

@ -48,7 +48,7 @@ ReturnValue_t SyrlinksFdir::eventReceived(EventMessage* event) {
// else // else
if (missedReplyCount.incrementAndCheck()) { if (missedReplyCount.incrementAndCheck()) {
handleRecovery(event->getEvent()); handleRecovery(event->getEvent());
//triggerEvent(syrlinks::FDIR_REACTION_IGNORED, event->getEvent(), 0); // triggerEvent(syrlinks::FDIR_REACTION_IGNORED, event->getEvent(), 0);
} }
break; break;
case StorageManagerIF::GET_DATA_FAILED: case StorageManagerIF::GET_DATA_FAILED:

10
mission/system/tree/system.cpp
View File

@ -93,13 +93,13 @@ void buildSafeSequence(Subsystem& ss, ModeListEntry& eh) {
ctxc); ctxc);
// Build SAFE transition 1 // Build SAFE transition 1
//check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)), // check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)),
// ctxc); // ctxc);
// Build Safe sequence // Build Safe sequence
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TGT.first, 0, false); ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TGT.first, 0, false);
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_0.first, 0, false); ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_0.first, 0, false);
//ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false); // ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false);
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_SAFE.first, &EIVE_SEQUENCE_SAFE.second, check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_SAFE.first, &EIVE_SEQUENCE_SAFE.second,
EIVE_SEQUENCE_SAFE.first)), EIVE_SEQUENCE_SAFE.first)),
ctxc); ctxc);
@ -135,13 +135,13 @@ void buildIdleSequence(Subsystem& ss, ModeListEntry& eh) {
ctxc); ctxc);
// Build SAFE transition 1 // Build SAFE transition 1
//check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)), // check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)),
// ctxc); // ctxc);
// Build Safe sequence // Build Safe sequence
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TGT.first, 0, false); ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TGT.first, 0, false);
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_0.first, 0, false); ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_0.first, 0, false);
//ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false); // ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false);
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_IDLE.first, &EIVE_SEQUENCE_IDLE.second, check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_IDLE.first, &EIVE_SEQUENCE_IDLE.second,
EIVE_SEQUENCE_SAFE.first)), EIVE_SEQUENCE_SAFE.first)),
ctxc); ctxc);