fixed conflicts

common/config/CMakeLists.txt

@@ -1,7 +1,7 @@
-target_include_directories(${TARGET_NAME} PRIVATE
+target_include_directories(${OBSW_NAME} PRIVATE
     ${CMAKE_CURRENT_SOURCE_DIR}
 )
 
-target_sources(${TARGET_NAME} PRIVATE
+target_sources(${OBSW_NAME} PRIVATE
     commonConfig.cpp
 )

common/config/OBSWVersion.h

@@ -4,7 +4,7 @@
 const char* const SW_NAME = "eive";
 
 #define SW_VERSION 1
-#define SW_SUBVERSION 8
-#define SW_REVISION 0
+#define SW_SUBVERSION 9
+#define SW_REVISION 1
 
 #endif /* COMMON_CONFIG_OBSWVERSION_H_ */

common/config/commonClassIds.h

@@ -26,10 +26,12 @@ enum commonClassIds: uint8_t {
     PLOC_MEMORY_DUMPER, //PLMEMDUMP
     PDEC_HANDLER, //PDEC
     CCSDS_HANDLER, //CCSDS
+    RATE_SETTER, //RS
     ARCSEC_JSON_BASE, //JSONBASE
     NVM_PARAM_BASE, //NVMB
     FILE_SYSTEM_HELPER, //FSHLP
     PLOC_MPSOC_HELPER, // PLMPHLP
+	SA_DEPL_HANDLER, //SADPL
 	COMMON_CLASS_ID_END // [EXPORT] : [END]
 };
 

common/config/commonConfig.h.in

@@ -12,7 +12,7 @@
 // because UDP packets are not allowed in the VPN
 // This will cause the OBSW to initialize the TMTC bridge responsible for exchanging data with the
 // CCSDS IP Cores. 
-#define OBSW_USE_TCP_BRIDGE             1
+#define OBSW_USE_TMTC_TCP_BRIDGE        1
 
 namespace common {
 extern const uint16_t PUS_PACKET_ID;

common/config/commonObjects.h

@@ -11,12 +11,9 @@ enum commonObjects: uint32_t {
     TMTC_BRIDGE = 0x50000300,
     TMTC_POLLING_TASK = 0x50000400,
     FILE_SYSTEM_HANDLER = 0x50000500,
+    SDC_MANAGER = 0x50000550,
     PTME = 0x50000600,
-    PAPB_VC0 = 0x50000700,
-    PAPB_VC1 = 0x50000701,
-    PAPB_VC2 = 0x50000702,
-    PAPB_VC3 = 0x50000703,
-    PDEC_HANDLER = 0x50000704,
+    PDEC_HANDLER = 0x50000700,
     CCSDS_HANDLER = 0x50000800,
 
     /* 0x43 ('C') for Controllers */
@@ -29,6 +26,7 @@ enum commonObjects: uint32_t {
     PDU1_HANDLER = 0x44250001,
     PDU2_HANDLER = 0x44250002,
     ACU_HANDLER = 0x44250003,
+    BPX_BATT_HANDLER = 0x44260000,
     TMP1075_HANDLER_1 = 0x44420004,
     TMP1075_HANDLER_2 = 0x44420005,
     MGM_0_LIS3_HANDLER = 0x44120006,
@@ -39,6 +37,7 @@ enum commonObjects: uint32_t {
     GYRO_1_L3G_HANDLER = 0x44120111,
     GYRO_2_ADIS_HANDLER = 0x44120212,
     GYRO_3_L3G_HANDLER = 0x44120313,
+    PLPCDU_HANDLER = 0x44300000,
 
     IMTQ_HANDLER = 0x44140014,
     PLOC_MPSOC_HANDLER = 0x44330015,
@@ -65,22 +64,20 @@ enum commonObjects: uint32_t {
     RTD_IC_17 = 0x44420030,
     RTD_IC_18 = 0x44420031,
 
-    SUS_1 = 0x44120032,
-    SUS_2 = 0x44120033,
-    SUS_3 = 0x44120034,
-    SUS_4 = 0x44120035,
-    SUS_5 = 0x44120036,
-    SUS_6 = 0x44120037,
-    SUS_7 = 0x44120038,
-    SUS_8 = 0x44120039,
-    SUS_9 = 0x44120040,
-    SUS_10 = 0x44120041,
-    SUS_11 = 0x44120042,
-    SUS_12 = 0x44120043,
-    SUS_13 = 0x44120044,
+    SUS_0 = 0x44120032,
+    SUS_1 = 0x44120033,
+    SUS_2 = 0x44120034,
+    SUS_3 = 0x44120035,
+    SUS_4 = 0x44120036,
+    SUS_5 = 0x44120037,
+    SUS_6 = 0x44120038,
+    SUS_7 = 0x44120039,
+    SUS_8 = 0x44120040,
+    SUS_9 = 0x44120041,
+    SUS_10 = 0x44120042,
+    SUS_11 = 0x44120043,
 
-    GPS0_HANDLER = 0x44130045,
-    GPS1_HANDLER = 0x44130146,
+    GPS_CONTROLLER = 0x44130045,
 
     RW1 = 0x44120047,
     RW2 = 0x44120148,
@@ -92,7 +89,9 @@ enum commonObjects: uint32_t {
     PLOC_UPDATER = 0x44330000,
     PLOC_MEMORY_DUMPER = 0x44330001,
     STR_HELPER = 0x44330002,
-    PLOC_MPSOC_HELPER = 0x44330003
+    PLOC_MPSOC_HELPER = 0x44330003,
+    AXI_PTME_CONFIG = 44330004,
+    PTME_CONFIG = 44330005,
 };
 }
 

common/config/commonSubsystemIds.h

@@ -20,6 +20,7 @@ enum: uint8_t {
 	PDEC_HANDLER = 119,
 	STR_HELPER = 120,
 	PLOC_MPSOC_HELPER = 121,
+	PL_PCDU_HANDLER = 121,
 	COMMON_SUBSYSTEM_ID_END
 };
 }

common/config/devConf.h

@@ -23,9 +23,17 @@ static constexpr uint32_t DEFAULT_L3G_SPEED = 976'000;
 static constexpr uint32_t L3G_TRANSITION_DELAY = 5000;
 static constexpr spi::SpiModes DEFAULT_L3G_MODE = spi::SpiModes::MODE_3;
 
-static constexpr uint32_t DEFAULT_MAX_1227_SPEED = 3'900'000;
+/**
+ * Some MAX1227 could not be reached with frequencies around 4 MHz. Maybe this is caused by
+ * the decoder and buffer circuits. Thus frequency is here defined to 1 MHz.
+ */
+static const uint32_t SUS_MAX1227_SPI_FREQ = 976'000;
+
+static constexpr uint32_t DEFAULT_MAX_1227_SPEED = 976'000;
 static constexpr spi::SpiModes DEFAULT_MAX_1227_MODE = spi::SpiModes::MODE_3;
 
+static constexpr uint32_t PL_PCDU_MAX_1227_SPEED = 976'000;
+
 static constexpr uint32_t DEFAULT_ADIS16507_SPEED = 976'000;
 static constexpr spi::SpiModes DEFAULT_ADIS16507_MODE = spi::SpiModes::MODE_3;
 
@@ -42,9 +50,9 @@ namespace uart {
 static constexpr size_t HYPERION_GPS_REPLY_MAX_BUFFER = 1024;
 static constexpr uint32_t SYRLINKS_BAUD = 38400;
 static constexpr uint32_t GNSS_BAUD = 9600;
-static constexpr uint32_t PLOC_MPSOC_BAUD = 115200;
+static constexpr uint32_t PLOC_MPSOC_BAUD = 921600;
 static constexpr uint32_t PLOC_SUPERVISOR_BAUD = 115200;
-static constexpr uint32_t STAR_TRACKER_BAUD = 115200;
+static constexpr uint32_t STAR_TRACKER_BAUD = 921600;
 
 }
 

common/config/devices/gpioIds.h

@@ -0,0 +1,126 @@
+#ifndef FSFWCONFIG_DEVICES_GPIOIDS_H_
+#define FSFWCONFIG_DEVICES_GPIOIDS_H_
+
+#include <fsfw_hal/common/gpio/GpioIF.h>
+
+namespace gpioIds {
+enum gpioId_t {
+  HEATER_0,
+  HEATER_1,
+  HEATER_2,
+  HEATER_3,
+  HEATER_4,
+  HEATER_5,
+  HEATER_6,
+  HEATER_7,
+  DEPLSA1,
+  DEPLSA2,
+
+  MGM_0_LIS3_CS,
+  MGM_1_RM3100_CS,
+  GYRO_0_ADIS_CS,
+  GYRO_1_L3G_CS,
+  GYRO_2_ADIS_CS,
+  GYRO_3_L3G_CS,
+  MGM_2_LIS3_CS,
+  MGM_3_RM3100_CS,
+
+  GNSS_0_NRESET,
+  GNSS_1_NRESET,
+  GNSS_0_ENABLE,
+  GNSS_1_ENABLE,
+  GNSS_SELECT,
+
+  GYRO_0_ENABLE,
+  GYRO_2_ENABLE,
+
+  TEST_ID_0,
+  TEST_ID_1,
+
+  RTD_IC_3,
+  RTD_IC_4,
+  RTD_IC_5,
+  RTD_IC_6,
+  RTD_IC_7,
+  RTD_IC_8,
+  RTD_IC_9,
+  RTD_IC_10,
+  RTD_IC_11,
+  RTD_IC_12,
+  RTD_IC_13,
+  RTD_IC_14,
+  RTD_IC_15,
+  RTD_IC_16,
+  RTD_IC_17,
+  RTD_IC_18,
+
+  CS_SUS_0,
+  CS_SUS_1,
+  CS_SUS_2,
+  CS_SUS_3,
+  CS_SUS_4,
+  CS_SUS_5,
+  CS_SUS_6,
+  CS_SUS_7,
+  CS_SUS_8,
+  CS_SUS_9,
+  CS_SUS_10,
+  CS_SUS_11,
+
+  SPI_MUX_BIT_0,
+  SPI_MUX_BIT_1,
+  SPI_MUX_BIT_2,
+  SPI_MUX_BIT_3,
+  SPI_MUX_BIT_4,
+  SPI_MUX_BIT_5,
+
+  CS_RAD_SENSOR,
+  ENABLE_RADFET,
+
+  PAPB_BUSY_N,
+  PAPB_EMPTY,
+
+  EN_RW1,
+  EN_RW2,
+  EN_RW3,
+  EN_RW4,
+
+  CS_RW1,
+  CS_RW2,
+  CS_RW3,
+  CS_RW4,
+
+  EN_RW_CS,
+
+  SPI_MUX,
+
+  VC0_PAPB_EMPTY,
+  VC0_PAPB_BUSY,
+  VC1_PAPB_EMPTY,
+  VC1_PAPB_BUSY,
+  VC2_PAPB_EMPTY,
+  VC2_PAPB_BUSY,
+  VC3_PAPB_EMPTY,
+  VC3_PAPB_BUSY,
+
+  PDEC_RESET,
+
+  RS485_EN_TX_DATA,
+  RS485_EN_TX_CLOCK,
+  RS485_EN_RX_DATA,
+  RS485_EN_RX_CLOCK,
+
+  BIT_RATE_SEL,
+
+  PLPCDU_ENB_VBAT0,
+  PLPCDU_ENB_VBAT1,
+  PLPCDU_ENB_DRO,
+  PLPCDU_ENB_X8,
+  PLPCDU_ENB_TX,
+  PLPCDU_ENB_HPA,
+  PLPCDU_ENB_MPA,
+  PLPCDU_ADC_CS
+};
+}
+
+#endif /* FSFWCONFIG_DEVICES_GPIOIDS_H_ */

common/config/lwgps_opts.h

@@ -41,4 +41,8 @@
  * copy & replace here settings you want to change values
  */
 
+#ifndef __DOXYGEN__
+#define __DOXYGEN__ 0
+#endif
+
 #endif /* LWGPS_HDR_OPTS_H */