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745526ce8a
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a56224c339
@ -17,6 +17,7 @@ static constexpr char UART_STAR_TRACKER_DEV[] = "/dev/ttyUL7";
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static constexpr char UIO_PDEC_REGISTERS[] = "/dev/uio0";
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static constexpr char UIO_PDEC_CONFIG_MEMORY[] = "/dev/uio2";
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static constexpr char UIO_PDEC_RAM[] = "/dev/uio3";
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static constexpr char UIO_PTME_CONFIG[] = "/dev/uio4";
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namespace gpioNames {
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static constexpr char GYRO_0_ADIS_CS[] = "gyro_0_adis_chip_select";
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@ -69,7 +70,6 @@ static constexpr char RS485_EN_TX_DATA[] = "tx_data_enable_ltc2872";
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static constexpr char RS485_EN_RX_CLOCK[] = "rx_clock_enable_ltc2872";
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static constexpr char RS485_EN_RX_DATA[] = "rx_data_enable_ltc2872";
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static constexpr char PDEC_RESET[] = "pdec_reset";
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static constexpr char BIT_RATE_SEL[] = "bit_rate_sel";
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} // namespace gpioNames
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} // namespace q7s
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@ -81,6 +81,7 @@
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#include <linux/obc/PtmeConfig.h>
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#include <linux/obc/PtmeRateSetter.h>
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#include <linux/obc/TxRateSetterIF.h>
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#include <linux/obc/PtmeAxiConfig.h>
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ResetArgs resetArgsGnss0;
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ResetArgs resetArgsGnss1;
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@ -943,17 +944,9 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF* gpioComIF) {
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ptme->addVcInterface(ccsds::VC2, vc2);
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ptme->addVcInterface(ccsds::VC3, vc3);
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GpioCookie* gpioCookieRateSetter = new GpioCookie;
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consumer.str("");
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consumer << "ptme rate setter";
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// Init to low -> default bit rate is low bit rate (200 kbps in downlink with syrlinks)
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gpio = new GpiodRegularByLineName(q7s::gpioNames::BIT_RATE_SEL, consumer.str(), gpio::DIR_OUT,
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gpio::LOW);
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gpioCookieRateSetter->addGpio(gpioIds::BIT_RATE_SEL, gpio);
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gpioComIF->addGpios(gpioCookieRateSetter);
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TxRateSetterIF* txRateSetterIF = new PtmeRateSetter(gpioIds::BIT_RATE_SEL, gpioComIF);
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PtmeAxiConfig* ptmeAxiConfig = new PtmeAxiConfig(objects::PTME_AXI_CONFIG,
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std::string(q7s::UIO_PTME_CONFIG));
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TxRateSetterIF* txRateSetterIF = new PtmeRateSetter(objects::TX_RATE_SETTER, ptmeAxiConfig);
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CCSDSHandler* ccsdsHandler = new CCSDSHandler(
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objects::CCSDS_HANDLER, objects::PTME, objects::CCSDS_PACKET_DISTRIBUTOR, txRateSetterIF,
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gpioComIF, gpioIds::RS485_EN_TX_CLOCK, gpioIds::RS485_EN_TX_DATA);
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@ -90,7 +90,9 @@ enum commonObjects: uint32_t {
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PLOC_UPDATER = 0x44330000,
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PLOC_MEMORY_DUMPER = 0x44330001,
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STR_HELPER = 0x44330002
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STR_HELPER = 0x44330002,
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PTME_AXI_CONFIG = 44330003,
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TX_RATE_SETTER = 44330004
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};
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}
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2
fsfw
2
fsfw
@ -1 +1 @@
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Subproject commit 9b77060295c9c32ebfc2e7cf6517eb2e66216191
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Subproject commit c1e0bcee6db652d6c474c87a4099e61ecf86b694
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@ -4,6 +4,7 @@ target_sources(${TARGET_NAME} PUBLIC
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PdecHandler.cpp
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PdecConfig.cpp
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PtmeRateSetter.cpp
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PtmeAxiConfig.cpp
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)
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49
linux/obc/PtmeAxiConfig.cpp
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49
linux/obc/PtmeAxiConfig.cpp
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@ -0,0 +1,49 @@
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#include <fcntl.h>
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#include <sys/mman.h>
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#include "PtmeAxiConfig.h"
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#include "fsfw/serviceinterface/ServiceInterface.h"
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PtmeAxiConfig::PtmeAxiConfig(object_id_t objectId, std::string configAxiUio) :
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SystemObject(objectId), configAxiUio(configAxiUio) {
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mutex = MutexFactory::instance()->createMutex();
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if (mutex == nullptr) {
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sif::warning << "Failed to create mutex" << std::endl;
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}
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}
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PtmeAxiConfig::~PtmeAxiConfig() {
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}
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ReturnValue_t PtmeAxiConfig::initialize() {
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int fd = open(configAxiUio.c_str(), O_RDWR);
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if (fd < 1) {
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sif::warning << "PtmeAxiConfig::initialize: Invalid UIO device file" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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baseAddress = static_cast<uint32_t*>(mmap(NULL, MAP_SIZE, PROT_WRITE | PROT_READ, MAP_SHARED,
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fd, 0));
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if (baseAddress == MAP_FAILED) {
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sif::warning << "PtmeAxiConfig::initialize: Failed to map uio address" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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ReturnValue_t PtmeAxiConfig::writeCaduRateReg(uint8_t rateVal) {
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ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
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result = mutex->lockMutex(timeoutType, mutexTimeout);
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if (result != HasReturnvaluesIF::RETURN_OK) {
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sif::warning << "PtmeAxiConfig::writeCaduRateReg: Failed to lock mutex" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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*(baseAddress + CADU_BITRATE_REG) = static_cast<uint32_t>(rateVal);
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result = mutex->unlockMutex();
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if (result != HasReturnvaluesIF::RETURN_OK) {
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sif::warning << "PtmeAxiConfig::writeCaduRateReg: Failed to unlock mutex" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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40
linux/obc/PtmeAxiConfig.h
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40
linux/obc/PtmeAxiConfig.h
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@ -0,0 +1,40 @@
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#ifndef LINUX_OBC_PTMEAXICONFIG_H_
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#define LINUX_OBC_PTMEAXICONFIG_H_
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#include <string>
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#include "fsfw/ipc/MutexIF.h"
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#include "fsfw/returnvalues/HasReturnvaluesIF.h"
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#include "fsfw/objectmanager/SystemObject.h"
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/**
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* @brief Class providing low level access to the configuration interface of the PTME.
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*
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* @author J. Meier
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*/
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class PtmeAxiConfig : public SystemObject {
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public:
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/**
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* @brief Constructor
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* @param configAxiUio Device file of UIO belonging to the AXI configuration interface.
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*/
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PtmeAxiConfig(object_id_t objectId, std::string configAxiUio);
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virtual ~PtmeAxiConfig();
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virtual ReturnValue_t initialize() override;
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ReturnValue_t writeCaduRateReg(uint8_t rateVal);
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private:
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// Address of register storing the bitrate configuration parameter
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static const uint32_t CADU_BITRATE_REG = 0x0;
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static const int MAP_SIZE = 0x1000;
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std::string configAxiUio;
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MutexIF* mutex = nullptr;
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MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
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uint32_t mutexTimeout = 20;
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uint32_t* baseAddress = nullptr;
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};
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#endif /* LINUX_OBC_PTMEAXICONFIG_H_ */
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@ -25,7 +25,8 @@ static const char UIO_DEVICE_FILE[] = "/dev/uio1";
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#else
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static const char UIO_DEVICE_FILE[] = "/dev/uio1";
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#endif
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// Bit clock frequency of PMTE IP core in Hz
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static const uint32_t BIT_CLK_FREQ = 20000000;
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}; // namespace PtmeConfig
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#endif /* LINUX_OBC_PTMECONFIG_H_ */
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@ -2,24 +2,40 @@
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#include "fsfw/serviceinterface/ServiceInterface.h"
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PtmeRateSetter::PtmeRateSetter(gpioId_t bitrateSel, GpioIF* gpioif)
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: bitrateSel(bitrateSel), gpioif(gpioif) {}
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PtmeRateSetter::PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig)
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: SystemObject(objectId), ptmeAxiConfig(ptmeAxiConfig) {}
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PtmeRateSetter::~PtmeRateSetter() {}
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ReturnValue_t PtmeRateSetter::initialize() {
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if (ptmeAxiConfig == nullptr) {
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sif::warning << "PtmeRateSetter::initialize: Invalid PtmeAxiConfig object" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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ReturnValue_t PtmeRateSetter::setRate(BitRates rate) {
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ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
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uint8_t rateVal = 0;
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switch (rate) {
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case RATE_2000KHZ:
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result = gpioif->pullHigh(bitrateSel);
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case RATE_2000KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 2000000 - 1);
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break;
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case RATE_400KHZ:
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result = gpioif->pullLow(bitrateSel);
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case RATE_1000KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 1000000 - 1);
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break;
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case RATE_500KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 500000 - 1);
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break;
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case RATE_200KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 200000 - 1);
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break;
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case RATE_100KBPS:
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rateVal = static_cast<uint8_t>(PtmeConfig::BIT_CLK_FREQ / 100000 - 1);
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break;
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default:
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sif::debug << "PtmeRateSetter::setRate: Invalid rate" << std::endl;
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result = HasReturnvaluesIF::RETURN_FAILED;
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break;
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sif::debug << "PtmeRateSetter::setRate: Unknown bit rate" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return result;
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return ptmeAxiConfig->writeCaduRateReg(rateVal);
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}
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@ -3,36 +3,36 @@
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#include "TxRateSetterIF.h"
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#include "fsfw/returnvalues/HasReturnvaluesIF.h"
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#include "fsfw_hal/common/gpio/GpioIF.h"
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#include "fsfw_hal/common/gpio/gpioDefinitions.h"
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#include "linux/obc/PtmeAxiConfig.h"
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#include "linux/obc/PtmeConfig.h"
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#include "fsfw/objectmanager/SystemObject.h"
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/**
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* @brief Class to set the downlink bit rate by using the cadu_rate_switcher implemented in
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* the programmable logic.
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* @brief Class to set the downlink bit rate by writing to the AXI configuration interface of the
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* PTME IP core.
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*
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* @details The cadu_rate_switcher module sets the input rate to the syrlinks transceiver either
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* to 2000 kHz (bitrateSel = 1) or 400 kHz (bitrate = 0).
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* @details This is the bitrate of the CADU clock and not the downlink which has twice the bitrate
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* of the CADU clock due to the convolutional code added by the s-Band transceiver.
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*
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* @author J. Meier
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*/
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class PtmeRateSetter : public TxRateSetterIF {
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public:
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/**
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* @brief Constructor
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*
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* @param bitrateSel GPIO ID of the GPIO connected to the bitrate_sel input of the
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* cadu_rate_switcher.
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* @param gpioif GPIO interface to drive the bitrateSel GPIO
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*/
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PtmeRateSetter(gpioId_t bitrateSel, GpioIF* gpioif);
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virtual ~PtmeRateSetter();
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class PtmeRateSetter: public TxRateSetterIF, public SystemObject {
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public:
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/**
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* @brief Constructor
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*
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* objectId Object id of system object
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* ptmeAxiConfig Pointer to object providing access to PTME configuration registers.
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*/
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PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig);
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virtual ~PtmeRateSetter();
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virtual ReturnValue_t setRate(BitRates rate);
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virtual ReturnValue_t initialize() override;
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virtual ReturnValue_t setRate(BitRates rate);
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private:
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gpioId_t bitrateSel = gpio::NO_GPIO;
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private:
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GpioIF* gpioif = nullptr;
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PtmeAxiConfig* ptmeAxiConfig = nullptr;
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};
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#endif /* LINUX_OBC_PTMERATESETTER_H_ */
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@ -3,7 +3,14 @@
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#include "fsfw/returnvalues/HasReturnvaluesIF.h"
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enum BitRates : uint32_t { RATE_2000KHZ, RATE_400KHZ };
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enum BitRates : uint32_t {
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RATE_2000KBPS,
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RATE_1000KBPS,
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RATE_500KBPS,
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RATE_400KBPS,
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RATE_200KBPS,
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RATE_100KBPS
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};
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/**
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* @brief Abstract class for objects implementing the functionality to switch the
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const uint8_t* data, size_t size) {
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switch (actionId) {
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case SET_LOW_RATE: {
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txRateSetterIF->setRate(BitRates::RATE_400KHZ);
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txRateSetterIF->setRate(BitRates::RATE_100KBPS);
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return EXECUTION_FINISHED;
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}
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case SET_HIGH_RATE: {
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txRateSetterIF->setRate(BitRates::RATE_2000KHZ);
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txRateSetterIF->setRate(BitRates::RATE_500KBPS);
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return EXECUTION_FINISHED;
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}
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case EN_TRANSMITTER: {
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@ -23,6 +23,9 @@
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* @brief This class handles the data exchange with the CCSDS IP cores implemented in the
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* programmable logic of the Q7S.
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*
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* @details After reboot default CADU bitrate is always set to 100 kbps (results in downlink rate
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* of 200 kbps due to convolutional code added by syrlinks transceiver)
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*
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* @author J. Meier
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*/
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class CCSDSHandler : public SystemObject,
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2
tmtc
2
tmtc
@ -1 +1 @@
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Subproject commit 6f24d6a83995ca7a895c17a77a00bceac4d7f141
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Subproject commit 580ac8b2d7e73aa860f3de55066187d7684d2d64
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