Merge pull request 'meier/rtdDebug' (#109) from meier/rtdDebug into develop
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EIVE/eive-obsw/pipeline/head This commit looks good
Reviewed-on: #109 Reviewed-by: Robin Müller <muellerr@irs.uni-stuttgart.de>
This commit is contained in:
commit
c7cd4afa01
@ -23,6 +23,16 @@ ReturnValue_t spiCallback(SpiComIF* comIf, SpiCookie *cookie, const uint8_t *sen
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uint8_t writeBuffer[2];
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uint8_t writeBuffer[2];
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uint8_t writeSize = 0;
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uint8_t writeSize = 0;
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gpioId_t gpioId = cookie->getChipSelectPin();
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GpioIF* gpioIF = comIf->getGpioInterface();
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MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
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uint32_t timeoutMs = 0;
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MutexIF* mutex = comIf->getMutex(&timeoutType, &timeoutMs);
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if(mutex == nullptr or gpioIF == nullptr) {
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sif::debug << "rwSpiCallback::spiCallback: Mutex or GPIO interface invalid" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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int fileDescriptor = 0;
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int fileDescriptor = 0;
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std::string device = cookie->getSpiDevice();
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std::string device = cookie->getSpiDevice();
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UnixFileGuard fileHelper(device, &fileDescriptor, O_RDWR, "rwSpiCallback::spiCallback");
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UnixFileGuard fileHelper(device, &fileDescriptor, O_RDWR, "rwSpiCallback::spiCallback");
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@ -35,16 +45,6 @@ ReturnValue_t spiCallback(SpiComIF* comIf, SpiCookie *cookie, const uint8_t *sen
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cookie->getSpiParameters(spiMode, spiSpeed, nullptr);
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cookie->getSpiParameters(spiMode, spiSpeed, nullptr);
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comIf->setSpiSpeedAndMode(fileDescriptor, spiMode, spiSpeed);
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comIf->setSpiSpeedAndMode(fileDescriptor, spiMode, spiSpeed);
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gpioId_t gpioId = cookie->getChipSelectPin();
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GpioIF* gpioIF = comIf->getGpioInterface();
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MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
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uint32_t timeoutMs = 0;
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MutexIF* mutex = comIf->getMutex(&timeoutType, &timeoutMs);
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if(mutex == nullptr or gpioIF == nullptr) {
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sif::debug << "rwSpiCallback::spiCallback: Mutex or GPIO interface invalid" << std::endl;
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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result = mutex->lockMutex(timeoutType, timeoutMs);
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result = mutex->lockMutex(timeoutType, timeoutMs);
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if (result != HasReturnvaluesIF::RETURN_OK) {
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if (result != HasReturnvaluesIF::RETURN_OK) {
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sif::debug << "rwSpiCallback::spiCallback: Failed to lock mutex" << std::endl;
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sif::debug << "rwSpiCallback::spiCallback: Failed to lock mutex" << std::endl;
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@ -119,7 +119,7 @@ ReturnValue_t spiCallback(SpiComIF* comIf, SpiCookie *cookie, const uint8_t *sen
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size_t replyBufferSize = cookie->getMaxBufferSize();
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size_t replyBufferSize = cookie->getMaxBufferSize();
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/** There must be a delay of 20 ms after sending the command */
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/** There must be a delay of at least 20 ms after sending the command */
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usleep(RwDefinitions::SPI_REPLY_DELAY);
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usleep(RwDefinitions::SPI_REPLY_DELAY);
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/**
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/**
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@ -27,14 +27,25 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
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GpiodRegularByLineName* spiMuxBit = nullptr;
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GpiodRegularByLineName* spiMuxBit = nullptr;
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/** Setting mux bit 1 to low will disable IC21 on the interface board */
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/** Setting mux bit 1 to low will disable IC21 on the interface board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
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gpio::OUT, gpio::LOW);
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gpio::OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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/** Setting mux bit 2 to low disables IC1 on the TCS board */
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/** Setting mux bit 2 to low disables IC1 on the TCS board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2", gpio::OUT, gpio::LOW);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2", gpio::OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3", gpio::OUT, gpio::LOW);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
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// gpio::OUT, gpio::LOW);
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// spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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// /** Setting mux bit 2 to low disables IC1 on the TCS board */
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// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2", gpio::OUT, gpio::HIGH);
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// spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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// /** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3", gpio::OUT, gpio::LOW);
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// spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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/** The following gpios can take arbitrary initial values */
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/** The following gpios can take arbitrary initial values */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 4", gpio::OUT, gpio::LOW);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 4", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
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@ -68,173 +79,308 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
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}
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}
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if (value == gpio::HIGH) {
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if (value == gpio::HIGH) {
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disableAllDecoder();
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switch (gpioId) {
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case(gpioIds::RTD_IC_3): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_4): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_5): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_6): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_7): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_8): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_9): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_10): {
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disableDecoderTcsIc1();
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break;
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}
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case(gpioIds::RTD_IC_11): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_12): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_13): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_14): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_15): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_16): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_17): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::RTD_IC_18): {
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disableDecoderTcsIc2();
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break;
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}
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case(gpioIds::CS_SUS_1): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_2): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_3): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_4): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_5): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_6): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_7): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_8): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_9): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_10): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_SUS_11): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_12): {
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disableDecoderInterfaceBoardIc2();
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break;
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}
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case(gpioIds::CS_SUS_13): {
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disableDecoderInterfaceBoardIc1();
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break;
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}
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case(gpioIds::CS_RW1): {
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disableRwDecoder();
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break;
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}
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case(gpioIds::CS_RW2): {
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disableRwDecoder();
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break;
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}
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case(gpioIds::CS_RW3): {
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disableRwDecoder();
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break;
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}
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case(gpioIds::CS_RW4): {
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disableRwDecoder();
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break;
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}
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default:
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sif::debug << "spiCsDecoderCallback: Invalid gpio id " << gpioId << std::endl;
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}
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}
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}
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else if (value == gpio::LOW) {
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else if (value == gpio::LOW) {
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switch (gpioId) {
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switch (gpioId) {
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case(gpioIds::RTD_IC_3): {
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case(gpioIds::RTD_IC_3): {
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selectY7();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY7();
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break;
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break;
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}
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}
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case(gpioIds::RTD_IC_4): {
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case(gpioIds::RTD_IC_4): {
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selectY6();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY6();
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break;
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break;
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}
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}
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case(gpioIds::RTD_IC_5): {
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case(gpioIds::RTD_IC_5): {
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selectY5();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY5();
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break;
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break;
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}
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}
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case(gpioIds::RTD_IC_6): {
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case(gpioIds::RTD_IC_6): {
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selectY4();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY4();
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break;
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break;
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}
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}
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case(gpioIds::RTD_IC_7): {
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case(gpioIds::RTD_IC_7): {
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selectY3();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY3();
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break;
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break;
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||||||
}
|
}
|
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case(gpioIds::RTD_IC_8): {
|
case(gpioIds::RTD_IC_8): {
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selectY2();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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||||||
selectY2();
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|
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break;
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break;
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||||||
}
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}
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||||||
case(gpioIds::RTD_IC_9): {
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case(gpioIds::RTD_IC_9): {
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||||||
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selectY1();
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enableDecoderTcsIc1();
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enableDecoderTcsIc1();
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selectY1();
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|
||||||
break;
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break;
|
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}
|
}
|
||||||
case(gpioIds::RTD_IC_10): {
|
case(gpioIds::RTD_IC_10): {
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||||||
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selectY0();
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||||||
enableDecoderTcsIc1();
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enableDecoderTcsIc1();
|
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selectY0();
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|
||||||
break;
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break;
|
||||||
}
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}
|
||||||
case(gpioIds::RTD_IC_11): {
|
case(gpioIds::RTD_IC_11): {
|
||||||
|
selectY7();
|
||||||
enableDecoderTcsIc2();
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enableDecoderTcsIc2();
|
||||||
selectY7();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_12): {
|
case(gpioIds::RTD_IC_12): {
|
||||||
|
selectY6();
|
||||||
enableDecoderTcsIc2();
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enableDecoderTcsIc2();
|
||||||
selectY6();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_13): {
|
case(gpioIds::RTD_IC_13): {
|
||||||
|
selectY5();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY5();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_14): {
|
case(gpioIds::RTD_IC_14): {
|
||||||
|
selectY4();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY4();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_15): {
|
case(gpioIds::RTD_IC_15): {
|
||||||
|
selectY3();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY3();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_16): {
|
case(gpioIds::RTD_IC_16): {
|
||||||
|
selectY2();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY2();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_17): {
|
case(gpioIds::RTD_IC_17): {
|
||||||
|
selectY1();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY1();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::RTD_IC_18): {
|
case(gpioIds::RTD_IC_18): {
|
||||||
|
selectY0();
|
||||||
enableDecoderTcsIc2();
|
enableDecoderTcsIc2();
|
||||||
selectY0();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_1): {
|
case(gpioIds::CS_SUS_1): {
|
||||||
|
selectY0();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY0();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_2): {
|
case(gpioIds::CS_SUS_2): {
|
||||||
|
selectY1();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY1();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_3): {
|
case(gpioIds::CS_SUS_3): {
|
||||||
|
selectY0();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY0();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_4): {
|
case(gpioIds::CS_SUS_4): {
|
||||||
|
selectY1();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY1();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_5): {
|
case(gpioIds::CS_SUS_5): {
|
||||||
|
selectY2();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY2();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_6): {
|
case(gpioIds::CS_SUS_6): {
|
||||||
|
selectY2();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY2();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_7): {
|
case(gpioIds::CS_SUS_7): {
|
||||||
|
selectY3();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY3();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_8): {
|
case(gpioIds::CS_SUS_8): {
|
||||||
|
selectY3();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY3();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_9): {
|
case(gpioIds::CS_SUS_9): {
|
||||||
|
selectY4();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY4();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_10): {
|
case(gpioIds::CS_SUS_10): {
|
||||||
|
selectY5();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY5();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_11): {
|
case(gpioIds::CS_SUS_11): {
|
||||||
|
selectY4();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY4();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_12): {
|
case(gpioIds::CS_SUS_12): {
|
||||||
|
selectY5();
|
||||||
enableDecoderInterfaceBoardIc2();
|
enableDecoderInterfaceBoardIc2();
|
||||||
selectY5();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_SUS_13): {
|
case(gpioIds::CS_SUS_13): {
|
||||||
|
selectY6();
|
||||||
enableDecoderInterfaceBoardIc1();
|
enableDecoderInterfaceBoardIc1();
|
||||||
selectY6();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_RW1): {
|
case(gpioIds::CS_RW1): {
|
||||||
|
selectY0();
|
||||||
enableRwDecoder();
|
enableRwDecoder();
|
||||||
selectY0();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_RW2): {
|
case(gpioIds::CS_RW2): {
|
||||||
|
selectY1();
|
||||||
enableRwDecoder();
|
enableRwDecoder();
|
||||||
selectY1();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_RW3): {
|
case(gpioIds::CS_RW3): {
|
||||||
|
selectY2();
|
||||||
enableRwDecoder();
|
enableRwDecoder();
|
||||||
selectY2();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case(gpioIds::CS_RW4): {
|
case(gpioIds::CS_RW4): {
|
||||||
|
selectY3();
|
||||||
enableRwDecoder();
|
enableRwDecoder();
|
||||||
selectY3();
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
@ -253,9 +399,9 @@ void enableDecoderTcsIc1() {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void enableDecoderTcsIc2() {
|
void enableDecoderTcsIc2() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void enableDecoderInterfaceBoardIc1() {
|
void enableDecoderInterfaceBoardIc1() {
|
||||||
@ -266,15 +412,41 @@ void enableDecoderInterfaceBoardIc1() {
|
|||||||
|
|
||||||
void enableDecoderInterfaceBoardIc2() {
|
void enableDecoderInterfaceBoardIc2() {
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
}
|
||||||
|
|
||||||
|
void disableDecoderTcsIc1() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
|
}
|
||||||
|
|
||||||
|
void disableDecoderTcsIc2() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
}
|
||||||
|
|
||||||
|
void disableDecoderInterfaceBoardIc1() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
|
}
|
||||||
|
|
||||||
|
void disableDecoderInterfaceBoardIc2() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
}
|
}
|
||||||
|
|
||||||
void enableRwDecoder() {
|
void enableRwDecoder() {
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
gpioComInterface->pullHigh(gpioIds::EN_RW_CS);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
}
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
|
||||||
gpioComInterface->pullHigh(gpioIds::EN_RW_CS);
|
void disableRwDecoder() {
|
||||||
|
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
void selectY0() {
|
void selectY0() {
|
||||||
@ -326,9 +498,9 @@ void selectY7() {
|
|||||||
}
|
}
|
||||||
|
|
||||||
void disableAllDecoder() {
|
void disableAllDecoder() {
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
|
||||||
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
|
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -44,10 +44,16 @@ namespace gpioCallbacks {
|
|||||||
*/
|
*/
|
||||||
void enableDecoderInterfaceBoardIc2();
|
void enableDecoderInterfaceBoardIc2();
|
||||||
|
|
||||||
|
void disableDecoderTcsIc1();
|
||||||
|
void disableDecoderTcsIc2();
|
||||||
|
void disableDecoderInterfaceBoardIc1();
|
||||||
|
void disableDecoderInterfaceBoardIc2();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief Enables the reaction wheel chip select decoder (IC3).
|
* @brief Enables the reaction wheel chip select decoder (IC3).
|
||||||
*/
|
*/
|
||||||
void enableRwDecoder();
|
void enableRwDecoder();
|
||||||
|
void disableRwDecoder();
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function disables all decoder.
|
* @brief This function disables all decoder.
|
||||||
|
@ -33,6 +33,7 @@ static constexpr uint32_t RW_SPEED = 300'000;
|
|||||||
static constexpr spi::SpiModes RW_MODE = spi::SpiModes::MODE_0;
|
static constexpr spi::SpiModes RW_MODE = spi::SpiModes::MODE_0;
|
||||||
|
|
||||||
static constexpr uint32_t RTD_SPEED = 2'000'000;
|
static constexpr uint32_t RTD_SPEED = 2'000'000;
|
||||||
|
static constexpr spi::SpiModes RTD_MODE = spi::SpiModes::MODE_3;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -36,9 +36,6 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
#endif
|
#endif
|
||||||
#if OBSW_ADD_RTD_DEVICES == 1
|
#if OBSW_ADD_RTD_DEVICES == 1
|
||||||
thisSequence->addSlot(objects::RTD_IC_0, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_1, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_2, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_3, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_3, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RTD_IC_4, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_4, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RTD_IC_5, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_5, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
@ -52,6 +49,9 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::RTD_IC_13, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_13, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RTD_IC_14, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_14, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RTD_IC_15, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RTD_IC_15, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_16, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_17, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_18, length * 0, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
#endif /* OBSW_ADD_RTD_DEVICES */
|
#endif /* OBSW_ADD_RTD_DEVICES */
|
||||||
|
|
||||||
#if OBSW_ADD_TMP_DEVICES == 1
|
#if OBSW_ADD_TMP_DEVICES == 1
|
||||||
@ -59,9 +59,6 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
#endif
|
#endif
|
||||||
#if OBSW_ADD_RTD_DEVICES == 1
|
#if OBSW_ADD_RTD_DEVICES == 1
|
||||||
thisSequence->addSlot(objects::RTD_IC_0, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_1, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_2, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_3, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_3, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_4, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_4, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_5, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_5, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
@ -75,6 +72,9 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::RTD_IC_13, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_13, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_14, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_14, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_15, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_15, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_16, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_17, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_18, length * 0.2, DeviceHandlerIF::SEND_WRITE);
|
||||||
#endif /* OBSW_ADD_RTD_DEVICES */
|
#endif /* OBSW_ADD_RTD_DEVICES */
|
||||||
|
|
||||||
#if OBSW_ADD_TMP_DEVICES == 1
|
#if OBSW_ADD_TMP_DEVICES == 1
|
||||||
@ -82,9 +82,6 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
#endif
|
#endif
|
||||||
#if OBSW_ADD_RTD_DEVICES == 1
|
#if OBSW_ADD_RTD_DEVICES == 1
|
||||||
thisSequence->addSlot(objects::RTD_IC_0, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_1, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_2, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_3, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_3, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_4, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_4, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_5, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_5, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
@ -98,6 +95,9 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::RTD_IC_13, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_13, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_14, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_14, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::RTD_IC_15, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RTD_IC_15, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_16, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_17, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_18, length * 0.4, DeviceHandlerIF::GET_WRITE);
|
||||||
#endif /* OBSW_ADD_RTD_DEVICES */
|
#endif /* OBSW_ADD_RTD_DEVICES */
|
||||||
|
|
||||||
#if OBSW_ADD_TMP_DEVICES == 1
|
#if OBSW_ADD_TMP_DEVICES == 1
|
||||||
@ -105,9 +105,6 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
#endif
|
#endif
|
||||||
#if OBSW_ADD_RTD_DEVICES == 1
|
#if OBSW_ADD_RTD_DEVICES == 1
|
||||||
thisSequence->addSlot(objects::RTD_IC_0, length * 0.6, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_1, length * 0.6, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_2, length * 0.6, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_3, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_3, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_4, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_4, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_5, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_5, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
@ -121,6 +118,9 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::RTD_IC_13, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_13, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_14, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_14, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_15, length * 0.6, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::RTD_IC_15, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_16, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_17, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_18, length * 0.6, DeviceHandlerIF::SEND_READ);
|
||||||
#endif /* OBSW_ADD_RTD_DEVICES */
|
#endif /* OBSW_ADD_RTD_DEVICES */
|
||||||
|
|
||||||
#if OBSW_ADD_TMP_DEVICES == 1
|
#if OBSW_ADD_TMP_DEVICES == 1
|
||||||
@ -128,9 +128,6 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::TMP1075_HANDLER_2, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
#endif
|
#endif
|
||||||
#if OBSW_ADD_RTD_DEVICES == 1
|
#if OBSW_ADD_RTD_DEVICES == 1
|
||||||
thisSequence->addSlot(objects::RTD_IC_0, length * 0.8, DeviceHandlerIF::GET_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_1, length * 0.8, DeviceHandlerIF::GET_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_2, length * 0.8, DeviceHandlerIF::GET_READ);
|
|
||||||
thisSequence->addSlot(objects::RTD_IC_3, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_3, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_4, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_4, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_5, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_5, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
@ -144,6 +141,9 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
thisSequence->addSlot(objects::RTD_IC_13, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_13, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_14, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_14, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
thisSequence->addSlot(objects::RTD_IC_15, length * 0.8, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RTD_IC_15, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_16, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_17, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
|
thisSequence->addSlot(objects::RTD_IC_18, length * 0.8, DeviceHandlerIF::GET_READ);
|
||||||
#endif /* OBSW_ADD_RTD_DEVICES */
|
#endif /* OBSW_ADD_RTD_DEVICES */
|
||||||
|
|
||||||
#if OBSW_ADD_RAD_SENSORS == 1
|
#if OBSW_ADD_RAD_SENSORS == 1
|
||||||
@ -439,8 +439,8 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if OBSW_ADD_ACS_BOARD == 1
|
#if OBSW_ADD_ACS_BOARD == 1
|
||||||
bool enableAside = true;
|
bool enableAside = false;
|
||||||
bool enableBside = false;
|
bool enableBside = true;
|
||||||
if(enableAside) {
|
if(enableAside) {
|
||||||
// A side
|
// A side
|
||||||
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * 0,
|
thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * 0,
|
||||||
|
@ -306,7 +306,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(packet[1] != DEFAULT_CONFIG) {
|
if(packet[1] != DEFAULT_CONFIG) {
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
// it propably would be better if we at least try one restart..
|
// it propably would be better if we at least try one restart..
|
||||||
sif::error << "Max31865PT1000Handler: Invalid configuration reply!" << std::endl;
|
sif::error << "Max31865PT1000Handler: Object ID: " << std::hex << this->getObjectId()
|
||||||
|
<< ": Invalid configuration reply!" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printError("Max31865PT1000Handler: Invalid configuration reply!\n");
|
sif::printError("Max31865PT1000Handler: Invalid configuration reply!\n");
|
||||||
#endif
|
#endif
|
||||||
@ -327,7 +328,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(readLowThreshold != LOW_THRESHOLD) {
|
if(readLowThreshold != LOW_THRESHOLD) {
|
||||||
#if FSFW_VERBOSE_LEVEL >= 1
|
#if FSFW_VERBOSE_LEVEL >= 1
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Missmatch between " <<
|
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Object ID: " <<
|
||||||
|
std::hex << this->getObjectId() << ": Missmatch between " <<
|
||||||
"written and readback value of low threshold register" << std::endl;
|
"written and readback value of low threshold register" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Missmatch between "
|
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Missmatch between "
|
||||||
@ -343,7 +345,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(readHighThreshold != HIGH_THRESHOLD) {
|
if(readHighThreshold != HIGH_THRESHOLD) {
|
||||||
#if FSFW_VERBOSE_LEVEL >= 1
|
#if FSFW_VERBOSE_LEVEL >= 1
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Missmatch between " <<
|
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Object ID: "
|
||||||
|
<< std::hex << this->getObjectId() << ": Missmatch between " <<
|
||||||
"written and readback value of high threshold register" << std::endl;
|
"written and readback value of high threshold register" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Missmatch between "
|
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Missmatch between "
|
||||||
@ -375,7 +378,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
#if OBSW_VERBOSE_LEVEL >= 1
|
#if OBSW_VERBOSE_LEVEL >= 1
|
||||||
if(debugDivider->checkAndIncrement()) {
|
if(debugDivider->checkAndIncrement()) {
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::info << "Max31865: Measured resistance is " << rtdValue << " Ohms." << std::endl;
|
sif::info << "Max31865: Object ID: " << std::hex << this->getObjectId()
|
||||||
|
<< ": Measured resistance is " << rtdValue << " Ohms." << std::endl;
|
||||||
sif::info << "Approximated temperature is " << approxTemp << " C" << std::endl;
|
sif::info << "Approximated temperature is " << approxTemp << " C" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printInfo("Max31685: Measured resistance is %f Ohms\n", rtdValue);
|
sif::printInfo("Max31685: Measured resistance is %f Ohms\n", rtdValue);
|
||||||
@ -388,11 +392,12 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(pg.getReadResult() != HasReturnvaluesIF::RETURN_OK) {
|
if(pg.getReadResult() != HasReturnvaluesIF::RETURN_OK) {
|
||||||
// Configuration error
|
// Configuration error
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Error reading dataset!"
|
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Object ID: "
|
||||||
|
<< std::hex << this->getObjectId() << ": Error reading dataset!"
|
||||||
<< std::endl;
|
<< std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: "
|
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: "
|
||||||
"Error reading dataset!\n");
|
"Error reading dataset!\n");
|
||||||
#endif
|
#endif
|
||||||
return pg.getReadResult();
|
return pg.getReadResult();
|
||||||
}
|
}
|
||||||
@ -411,7 +416,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
faultByte = packet[1];
|
faultByte = packet[1];
|
||||||
#if OBSW_VERBOSE_LEVEL >= 1
|
#if OBSW_VERBOSE_LEVEL >= 1
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Fault byte"
|
sif::warning << "Max31865PT1000Handler::interpretDeviceReply: Object ID: "
|
||||||
|
<< std::hex << this->getObjectId() << ": Fault byte"
|
||||||
" is: 0b" << std::bitset<8>(faultByte) << std::endl;
|
" is: 0b" << std::bitset<8>(faultByte) << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Fault byte"
|
sif::printWarning("Max31865PT1000Handler::interpretDeviceReply: Fault byte"
|
||||||
@ -422,7 +428,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(result != HasReturnvaluesIF::RETURN_OK) {
|
if(result != HasReturnvaluesIF::RETURN_OK) {
|
||||||
// Configuration error
|
// Configuration error
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::debug << "Max31865PT1000Handler::interpretDeviceReply: "
|
sif::debug << "Max31865PT1000Handler::interpretDeviceReply: Object ID: " << std::hex
|
||||||
|
<< this->getObjectId() << ":"
|
||||||
"Error reading dataset!" << std::endl;
|
"Error reading dataset!" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printDebug("Max31865PT1000Handler::interpretDeviceReply: "
|
sif::printDebug("Max31865PT1000Handler::interpretDeviceReply: "
|
||||||
@ -440,8 +447,8 @@ ReturnValue_t Max31865PT1000Handler::interpretDeviceReply(
|
|||||||
if(result != HasReturnvaluesIF::RETURN_OK) {
|
if(result != HasReturnvaluesIF::RETURN_OK) {
|
||||||
// Configuration error
|
// Configuration error
|
||||||
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
#if FSFW_CPP_OSTREAM_ENABLED == 1
|
||||||
sif::debug << "Max31865PT1000Handler::interpretDeviceReply: "
|
sif::debug << "Max31865PT1000Handler::interpretDeviceReply: Object ID: " << std::hex
|
||||||
"Error commiting dataset!" << std::endl;
|
<< this->getObjectId() << ": Error commiting dataset!" << std::endl;
|
||||||
#else
|
#else
|
||||||
sif::printDebug("Max31865PT1000Handler::interpretDeviceReply: "
|
sif::printDebug("Max31865PT1000Handler::interpretDeviceReply: "
|
||||||
"Error commiting dataset!\n");
|
"Error commiting dataset!\n");
|
||||||
|
@ -37,7 +37,7 @@ public:
|
|||||||
// 1. 1 for V_BIAS enabled, 0 for disabled
|
// 1. 1 for V_BIAS enabled, 0 for disabled
|
||||||
// 2. 1 for Auto-conversion, 0 for off
|
// 2. 1 for Auto-conversion, 0 for off
|
||||||
// 3. 1 for 1-shot enabled, 0 for disabled (self-clearing bit)
|
// 3. 1 for 1-shot enabled, 0 for disabled (self-clearing bit)
|
||||||
// 4. 1 for 3-wire disabled, 0 for disabled
|
// 4. 1 for 3-wire enabled, 0 for disabled (two and four wired RTD)
|
||||||
// 5./6. Fault detection: 00 for no action, 01 for automatic delay, 1
|
// 5./6. Fault detection: 00 for no action, 01 for automatic delay, 1
|
||||||
// 0 for run fault detection with manual delay,
|
// 0 for run fault detection with manual delay,
|
||||||
// 11 for finish fault detection with manual delay
|
// 11 for finish fault detection with manual delay
|
||||||
|
Loading…
Reference in New Issue
Block a user