try to get rid of the nanosleep
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@ -65,12 +65,6 @@ ReturnValue_t PapbVcInterface::write(const uint8_t* data, size_t size) {
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// idx += 4;
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// idx += 4;
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// }
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// }
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for (size_t idx = 0; idx < size; idx++) {
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for (size_t idx = 0; idx < size; idx++) {
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// This delay is super-important, DO NOT REMOVE!
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// Polling the GPIO or the config register too often messes up the scheduler.
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// TODO: Maybe this should not be done like this. It would be better if there was a custom
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// FPGA module which can accept packets and then takes care of dumping that packet into
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// the PTME. DMA would be an ideal solution for this.
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nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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if (pollInterfaceReadiness(2, false) == returnvalue::OK) {
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if (pollInterfaceReadiness(2, false) == returnvalue::OK) {
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*(vcBaseReg + DATA_REG_OFFSET) = static_cast<uint32_t>(data[idx]);
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*(vcBaseReg + DATA_REG_OFFSET) = static_cast<uint32_t>(data[idx]);
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} else {
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} else {
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@ -78,7 +72,6 @@ ReturnValue_t PapbVcInterface::write(const uint8_t* data, size_t size) {
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return returnvalue::FAILED;
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return returnvalue::FAILED;
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}
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}
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}
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}
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nanosleep(&BETWEEN_POLL_DELAY, &remDelay);
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if (pollInterfaceReadiness(2, false) == returnvalue::OK) {
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if (pollInterfaceReadiness(2, false) == returnvalue::OK) {
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completePacketTransfer();
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completePacketTransfer();
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} else {
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} else {
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