ploc components now compile for hosted (linux)
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2022-11-10 17:32:11 +01:00
parent 5ed0ade358
commit ec7ce5ddb6
45 changed files with 116 additions and 46 deletions

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@ -1,11 +1,12 @@
#ifndef COMMON_CONFIG_DEVCONF_H_
#define COMMON_CONFIG_DEVCONF_H_
#include <fsfw_hal/linux/serial/SerialCookie.h>
#include <cstdint>
#include "fsfw/timemanager/clockDefinitions.h"
#include "fsfw_hal/linux/spi/spiDefinitions.h"
#include "fsfw_hal/linux/uart/UartCookie.h"
/**
* SPI configuration will be contained here to let the device handlers remain independent

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@ -0,0 +1,87 @@
#ifndef FSFWCONFIG_DEVICES_ADDRESSES_H_
#define FSFWCONFIG_DEVICES_ADDRESSES_H_
#include <fsfw/devicehandlers/CookieIF.h>
#include <cstdint>
#include "objects/systemObjectList.h"
namespace addresses {
/* Logical addresses have uint32_t datatype */
enum logicalAddresses : address_t {
PCDU,
MGM_0_LIS3 = objects::MGM_0_LIS3_HANDLER,
MGM_1_RM3100 = objects::MGM_1_RM3100_HANDLER,
MGM_2_LIS3 = objects::MGM_2_LIS3_HANDLER,
MGM_3_RM3100 = objects::MGM_3_RM3100_HANDLER,
GYRO_0_ADIS = objects::GYRO_0_ADIS_HANDLER,
GYRO_1_L3G = objects::GYRO_1_L3G_HANDLER,
GYRO_2_ADIS = objects::GYRO_2_ADIS_HANDLER,
GYRO_3_L3G = objects::GYRO_3_L3G_HANDLER,
RAD_SENSOR = objects::RAD_SENSOR,
SUS_0 = objects::SUS_0_N_LOC_XFYFZM_PT_XF,
SUS_1 = objects::SUS_1_N_LOC_XBYFZM_PT_XB,
SUS_2 = objects::SUS_2_N_LOC_XFYBZB_PT_YB,
SUS_3 = objects::SUS_3_N_LOC_XFYBZF_PT_YF,
SUS_4 = objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
SUS_5 = objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
SUS_6 = objects::SUS_6_R_LOC_XFYBZM_PT_XF,
SUS_7 = objects::SUS_7_R_LOC_XBYBZM_PT_XB,
SUS_8 = objects::SUS_8_R_LOC_XBYBZB_PT_YB,
SUS_9 = objects::SUS_9_R_LOC_XBYBZB_PT_YF,
SUS_10 = objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
SUS_11 = objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
/* Dummy and Test Addresses */
DUMMY_ECHO = 129,
DUMMY_GPS0 = 130,
DUMMY_GPS1 = 131,
};
enum i2cAddresses : address_t {
BPX_BATTERY = 0x07,
IMTQ = 0x10,
TMP1075_TCS_1 = 0x48,
TMP1075_TCS_2 = 0x49,
};
enum spiAddresses : address_t {
RTD_IC_3,
RTD_IC_4,
RTD_IC_5,
RTD_IC_6,
RTD_IC_7,
RTD_IC_8,
RTD_IC_9,
RTD_IC_10,
RTD_IC_11,
RTD_IC_12,
RTD_IC_13,
RTD_IC_14,
RTD_IC_15,
RTD_IC_16,
RTD_IC_17,
RTD_IC_18,
RW1,
RW2,
RW3,
RW4,
PLPCDU_ADC
};
/* Addresses of devices supporting the CSP protocol */
enum cspAddresses : uint8_t {
P60DOCK = 4,
ACU = 2,
PDU1 = 3,
/* PDU2 occupies X4 slot of P60Dock */
PDU2 = 6
};
} // namespace addresses
#endif /* FSFWCONFIG_DEVICES_ADDRESSES_H_ */

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@ -16,6 +16,10 @@ enum commonObjects : uint32_t {
PDEC_HANDLER = 0x50000700,
CCSDS_HANDLER = 0x50000800,
/* 0x49 ('I') for Communication Interfaces **/
UART_COM_IF = 0x49030003,
SCEX_UART_READER = 0x49010006,
/* 0x43 ('C') for Controllers */
THERMAL_CONTROLLER = 0x43400001,
ACS_CONTROLLER = 0x43000002,