bsp_q7s/core/ObjectFactory.cpp

@@ -78,10 +78,8 @@
 #include <linux/obc/PapbVcInterface.h>
 #include <linux/obc/PdecHandler.h>
 #include <linux/obc/Ptme.h>
-#include <linux/obc/PtmeAxiConfig.h>
+#include <linux/obc/AxiPtmeConfig.h>
 #include <linux/obc/PtmeConfig.h>
-#include <linux/obc/PtmeRateSetter.h>
-#include <linux/obc/TxRateSetterIF.h>
 
 ResetArgs resetArgsGnss0;
 ResetArgs resetArgsGnss1;
@@ -149,6 +147,8 @@ void ObjectFactory::produce(void* args) {
 #if OBSW_DEBUG_IMTQ == 1
   imtqHandler->setToGoToNormal(true);
   imtqHandler->setStartUpImmediately();
+#else
+  (void)imtqHandler;
 #endif
 #endif
   createReactionWheelComponents(gpioComIF);
@@ -958,11 +958,11 @@ void ObjectFactory::createCcsdsComponents(LinuxLibgpioIF* gpioComIF) {
   ptme->addVcInterface(ccsds::VC2, vc2);
   ptme->addVcInterface(ccsds::VC3, vc3);
 
-  PtmeAxiConfig* ptmeAxiConfig =
+  AxiPtmeConfig* axiPtmeConfig =
-      new PtmeAxiConfig(objects::PTME_AXI_CONFIG, q7s::UIO_PTME, q7s::uiomapids::PTME_CONFIG);
+      new AxiPtmeConfig(objects::AXI_PTME_CONFIG, q7s::UIO_PTME, q7s::uiomapids::PTME_CONFIG);
-  TxRateSetterIF* txRateSetterIF = new PtmeRateSetter(objects::TX_RATE_SETTER, ptmeAxiConfig);
+  PtmeConfig* ptmeConfig = new PtmeConfig(objects::PTME_CONFIG, axiPtmeConfig);
   CCSDSHandler* ccsdsHandler = new CCSDSHandler(
-      objects::CCSDS_HANDLER, objects::PTME, objects::CCSDS_PACKET_DISTRIBUTOR, txRateSetterIF,
+      objects::CCSDS_HANDLER, objects::PTME, objects::CCSDS_PACKET_DISTRIBUTOR, ptmeConfig,
       gpioComIF, gpioIds::RS485_EN_TX_CLOCK, gpioIds::RS485_EN_TX_DATA);
 
   VirtualChannel* vc = nullptr;

common/config/commonObjects.h

@@ -87,8 +87,8 @@ enum commonObjects: uint32_t {
     PLOC_UPDATER = 0x44330000,
     PLOC_MEMORY_DUMPER = 0x44330001,
     STR_HELPER = 0x44330002,
-    PTME_AXI_CONFIG = 44330003,
+    AXI_PTME_CONFIG = 44330003,
-    TX_RATE_SETTER = 44330004
+    PTME_CONFIG = 44330004,
 };
 }
 

fsfw

@@ -1 +1 @@
-Subproject commit cc7a3a5a342aa274ba85805ebdfef65224bbe80c
+Subproject commit faf7da2743dcd30d83c3ab2f7b4d85277878e636

linux/fsfwconfig/OBSWConfig.h.in

@@ -53,6 +53,7 @@ debugging. */
 #define OBSW_ADD_RAD_SENSORS                        0
 #define OBSW_ADD_SYRLINKS                           0
 #define OBSW_ENABLE_SYRLINKS_TRANSMIT_TIMEOUT       0
+#define OBSW_SYRLINKS_SIMULATED										  1
 
 #endif
 

linux/obc/AxiPtmeConfig.cpp

@@ -0,0 +1,119 @@
+#include "AxiPtmeConfig.h"
+
+#include "fsfw/serviceinterface/ServiceInterface.h"
+#include "fsfw_hal/linux/uio/UioMapper.h"
+
+AxiPtmeConfig::AxiPtmeConfig(object_id_t objectId, std::string axiUio, int mapNum)
+    : SystemObject(objectId), axiUio(axiUio), mapNum(mapNum) {
+  mutex = MutexFactory::instance()->createMutex();
+  if (mutex == nullptr) {
+    sif::warning << "Failed to create mutex" << std::endl;
+  }
+}
+
+AxiPtmeConfig::~AxiPtmeConfig() {}
+
+ReturnValue_t AxiPtmeConfig::initialize() {
+  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
+  UioMapper uioMapper(axiUio, mapNum);
+  result = uioMapper.getMappedAdress(&baseAddress, UioMapper::Permissions::READ_WRITE);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::writeCaduRateReg(uint8_t rateVal) {
+  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
+  result = mutex->lockMutex(timeoutType, mutexTimeout);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::writeCaduRateReg: Failed to lock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  *(baseAddress + CADU_BITRATE_REG) = static_cast<uint32_t>(rateVal);
+  result = mutex->unlockMutex();
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::writeCaduRateReg: Failed to unlock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::enableTxclockManipulator() {
+  ReturnValue_t result = writeBit(COMMON_CONFIG_REG, true, BitPos::EN_TX_CLK_MANIPULATOR);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::disableTxclockManipulator() {
+  ReturnValue_t result = writeBit(COMMON_CONFIG_REG, false, BitPos::EN_TX_CLK_MANIPULATOR);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::enableTxclockInversion() {
+  ReturnValue_t result = writeBit(COMMON_CONFIG_REG, true, BitPos::INVERT_CLOCK);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::disableTxclockInversion() {
+  ReturnValue_t result = writeBit(COMMON_CONFIG_REG, false, BitPos::INVERT_CLOCK);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::writeReg(uint32_t regOffset, uint32_t writeVal) {
+  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
+  result = mutex->lockMutex(timeoutType, mutexTimeout);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::readReg: Failed to lock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  *(baseAddress + regOffset / ADRESS_DIVIDER) = writeVal;
+  result = mutex->unlockMutex();
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::readReg: Failed to unlock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::readReg(uint32_t regOffset, uint32_t* readVal) {
+  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
+  result = mutex->lockMutex(timeoutType, mutexTimeout);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::readReg: Failed to lock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  *readVal = *(baseAddress + regOffset / ADRESS_DIVIDER);
+  result = mutex->unlockMutex();
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    sif::warning << "AxiPtmeConfig::readReg: Failed to unlock mutex" << std::endl;
+    return HasReturnvaluesIF::RETURN_FAILED;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}
+
+ReturnValue_t AxiPtmeConfig::writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos) {
+  uint32_t readVal = 0;
+  ReturnValue_t result = readReg(regOffset, &readVal);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  uint32_t writeVal = (readVal & ~(1 << static_cast<uint32_t>(bitPos))) |
+                      bitVal << static_cast<uint32_t>(bitPos);
+  result = writeReg(regOffset, writeVal);
+  if (result != HasReturnvaluesIF::RETURN_OK) {
+    return result;
+  }
+  return HasReturnvaluesIF::RETURN_OK;
+}

linux/obc/AxiPtmeConfig.h

@@ -0,0 +1,102 @@
+#ifndef LINUX_OBC_AXIPTMECONFIG_H_
+#define LINUX_OBC_AXIPTMECONFIG_H_
+
+#include <string>
+
+#include "fsfw/ipc/MutexIF.h"
+#include "fsfw/objectmanager/SystemObject.h"
+#include "fsfw/returnvalues/HasReturnvaluesIF.h"
+
+/**
+ * @brief   Class providing low level access to the configuration interface of the PTME.
+ *
+ * @author  J. Meier
+ */
+class AxiPtmeConfig : public SystemObject {
+ public:
+  /**
+   * @brief   Constructor
+   * @param axiUio    Device file of UIO belonging to the AXI configuration interface.
+   * @param mapNum    Number of map belonging to axi configuration interface.
+   */
+  AxiPtmeConfig(object_id_t objectId, std::string axiUio, int mapNum);
+  virtual ~AxiPtmeConfig();
+
+  virtual ReturnValue_t initialize() override;
+  /**
+   * @brief Will write to the bitrate configuration register. Actual generated rate depends on
+   *        frequency of the clock connected to the bit clock input of PTME.
+   */
+  ReturnValue_t writeCaduRateReg(uint8_t rateVal);
+
+  /**
+   * @brief Next to functions control the tx clock manipulator component
+   *
+   * @details   If the tx clock manipulator is enabled the output clock of the PTME is manipulated
+   *            in a way that both high and low periods in the clock signal have equal lengths.
+   *            The default implementation of the PTME generates a clock where the high level is
+   *            only one bit clock period long. This might be too short to match the setup and hold
+   *            times of the S-and transceiver.
+   */
+  ReturnValue_t enableTxclockManipulator();
+  ReturnValue_t disableTxclockManipulator();
+
+  /**
+   * @brief The next to functions control whether data will be updated on the rising or falling edge
+   *        of the tx clock.
+   *        Enable inversion will update data on falling edge (not the configuration required by the
+   *        syrlinks)
+   *        Disable clock inversion. Data updated on rising edge.
+   */
+  ReturnValue_t enableTxclockInversion();
+  ReturnValue_t disableTxclockInversion();
+
+ private:
+  // Address of register storing the bitrate configuration parameter
+  static const uint32_t CADU_BITRATE_REG = 0x0;
+  // Address to register storing common configuration parameters
+  static const uint32_t COMMON_CONFIG_REG = 0x4;
+  static const uint32_t ADRESS_DIVIDER = 4;
+
+  enum class BitPos : uint32_t {
+      EN_TX_CLK_MANIPULATOR,
+      INVERT_CLOCK
+  };
+
+  std::string axiUio;
+  std::string uioMap;
+  int mapNum = 0;
+  MutexIF* mutex = nullptr;
+  MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
+  uint32_t mutexTimeout = 20;
+
+  uint32_t* baseAddress = nullptr;
+
+  /**
+   * @brief Function to write to configuration registers
+   *
+   * @param writeVal    Value to write
+   */
+  ReturnValue_t writeReg(uint32_t regOffset, uint32_t writeVal);
+
+  /**
+   * @brief Reads value from configuration register
+   *
+   * @param regOffset   Offset of register from base address to read from
+   * Qparam readVal     Pointer to variable where read value will be written to
+   */
+  ReturnValue_t readReg(uint32_t regOffset, uint32_t* readVal);
+
+  /**
+   * @brief Sets one bit in a register
+   *
+   * @param regOffset    Offset of the register where to set the bit
+   * @param bitVal       The value of the bit to set (1 or 0)
+   * @param bitPos       The position of the bit within the register to set
+   *
+   * @return             RETURN_OK if successful, otherwise RETURN_FAILED
+   */
+  ReturnValue_t writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos);
+};
+
+#endif /* LINUX_OBC_AXIPTMECONFIG_H_ */

linux/obc/CMakeLists.txt

@@ -3,8 +3,8 @@ target_sources(${TARGET_NAME} PUBLIC
 	Ptme.cpp
 	PdecHandler.cpp
 	PdecConfig.cpp
-	PtmeRateSetter.cpp
+	PtmeConfig.cpp
-	PtmeAxiConfig.cpp
+	AxiPtmeConfig.cpp
 )
 
 

linux/obc/PtmeAxiConfig.cpp

@@ -1,40 +0,0 @@
-#include "PtmeAxiConfig.h"
-
-#include "fsfw/serviceinterface/ServiceInterface.h"
-#include "fsfw_hal/linux/uio/UioMapper.h"
-
-PtmeAxiConfig::PtmeAxiConfig(object_id_t objectId, std::string configAxiUio, int mapNum)
-    : SystemObject(objectId), configAxiUio(configAxiUio), mapNum(mapNum) {
-  mutex = MutexFactory::instance()->createMutex();
-  if (mutex == nullptr) {
-    sif::warning << "Failed to create mutex" << std::endl;
-  }
-}
-
-PtmeAxiConfig::~PtmeAxiConfig() {}
-
-ReturnValue_t PtmeAxiConfig::initialize() {
-  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
-  UioMapper uioMapper(configAxiUio, mapNum);
-  result = uioMapper.getMappedAdress(&baseAddress, UioMapper::Permissions::READ_WRITE);
-  if (result != HasReturnvaluesIF::RETURN_OK) {
-    return result;
-  }
-  return HasReturnvaluesIF::RETURN_OK;
-}
-
-ReturnValue_t PtmeAxiConfig::writeCaduRateReg(uint8_t rateVal) {
-  ReturnValue_t result = HasReturnvaluesIF::RETURN_OK;
-  result = mutex->lockMutex(timeoutType, mutexTimeout);
-  if (result != HasReturnvaluesIF::RETURN_OK) {
-    sif::warning << "PtmeAxiConfig::writeCaduRateReg: Failed to lock mutex" << std::endl;
-    return HasReturnvaluesIF::RETURN_FAILED;
-  }
-  *(baseAddress + CADU_BITRATE_REG) = static_cast<uint32_t>(rateVal);
-  result = mutex->unlockMutex();
-  if (result != HasReturnvaluesIF::RETURN_OK) {
-    sif::warning << "PtmeAxiConfig::writeCaduRateReg: Failed to unlock mutex" << std::endl;
-    return HasReturnvaluesIF::RETURN_FAILED;
-  }
-  return HasReturnvaluesIF::RETURN_OK;
-}

linux/obc/PtmeAxiConfig.h

@@ -1,42 +0,0 @@
-#ifndef LINUX_OBC_PTMEAXICONFIG_H_
-#define LINUX_OBC_PTMEAXICONFIG_H_
-
-#include <string>
-
-#include "fsfw/ipc/MutexIF.h"
-#include "fsfw/objectmanager/SystemObject.h"
-#include "fsfw/returnvalues/HasReturnvaluesIF.h"
-
-/**
- * @brief   Class providing low level access to the configuration interface of the PTME.
- *
- * @author  J. Meier
- */
-class PtmeAxiConfig : public SystemObject {
- public:
-  /**
-   * @brief   Constructor
-   * @param configAxiUio  Device file of UIO belonging to the AXI configuration interface.
-   * @param mapNum    Number of map belonging to axi configuration interface.
-   */
-  PtmeAxiConfig(object_id_t objectId, std::string configAxiUio, int mapNum);
-  virtual ~PtmeAxiConfig();
-
-  virtual ReturnValue_t initialize() override;
-  ReturnValue_t writeCaduRateReg(uint8_t rateVal);
-
- private:
-  // Address of register storing the bitrate configuration parameter
-  static const uint32_t CADU_BITRATE_REG = 0x0;
-
-  std::string configAxiUio;
-  std::string uioMap;
-  int mapNum = 0;
-  MutexIF* mutex = nullptr;
-  MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
-  uint32_t mutexTimeout = 20;
-
-  uint32_t* baseAddress = nullptr;
-};
-
-#endif /* LINUX_OBC_PTMEAXICONFIG_H_ */

linux/obc/PtmeConfig.cpp

@@ -0,0 +1,52 @@
+#include "PtmeConfig.h"
+
+#include "fsfw/serviceinterface/ServiceInterface.h"
+
+PtmeConfig::PtmeConfig(object_id_t objectId, AxiPtmeConfig* axiPtmeConfig)
+    : SystemObject(objectId), axiPtmeConfig(axiPtmeConfig) {}
+
+PtmeConfig::~PtmeConfig() {}
+
+ReturnValue_t PtmeConfig::initialize() {
+  if (axiPtmeConfig == nullptr) {
+    sif::warning << "PtmeConfig::initialize: Invalid AxiPtmeConfig object" << std::endl;
+    return RETURN_FAILED;
+  }
+  return RETURN_OK;
+}
+
+ReturnValue_t PtmeConfig::setRate(uint32_t bitRate) {
+  if (bitRate == 0) {
+    return BAD_BIT_RATE;
+  }
+  uint32_t rateVal = BIT_CLK_FREQ / bitRate - 1;
+  if (rateVal > 0xFF) {
+    return RATE_NOT_SUPPORTED;
+  }
+  return axiPtmeConfig->writeCaduRateReg(static_cast<uint8_t>(rateVal));
+}
+
+ReturnValue_t PtmeConfig::invertTxClock(bool invert) {
+    ReturnValue_t result = RETURN_OK;
+    if (invert) {
+        result = axiPtmeConfig->enableTxclockInversion();
+    }
+    else {
+        result = axiPtmeConfig->disableTxclockInversion();
+    }
+    if (result != RETURN_OK) {
+        return CLK_INVERSION_FAILED;
+    }
+    return result;
+}
+
+ReturnValue_t PtmeConfig::configTxManipulator(bool enable) {
+    ReturnValue_t result = RETURN_OK;
+    if (enable) {
+        result = axiPtmeConfig->enableTxclockManipulator();
+    }
+    else {
+        result = axiPtmeConfig->disableTxclockManipulator();
+    }
+    return result;
+}

linux/obc/PtmeConfig.h

@@ -1,32 +1,75 @@
 #ifndef LINUX_OBC_PTMECONFIG_H_
 #define LINUX_OBC_PTMECONFIG_H_
 
-#include <cstring>
+#include "fsfw/objectmanager/SystemObject.h"
-
-#include "OBSWConfig.h"
 #include "fsfw/returnvalues/HasReturnvaluesIF.h"
+#include "linux/obc/PtmeConfig.h"
+#include "AxiPtmeConfig.h"
 
 /**
- * @brief   PTME specific configuration parameters derived from FPGA design and device tree.
+ * @brief   Class to configure donwlink specific parameters in the PTME IP core.
  *
  * @author  J. Meier
  */
-namespace PtmeConfig {
+class PtmeConfig : public SystemObject, public HasReturnvaluesIF {
-/**
+ public:
- * Offset of virtual channels mapped into address space
+  /**
- * 0x10000 = (0x4000 * 4)
+   * @brief Constructor
+   *
+   * ptmeAxiConfig  Pointer to object providing access to PTME configuration registers.
    */
-static const uint32_t VC0_OFFSETT = 0;
+  PtmeConfig(object_id_t opbjectId, AxiPtmeConfig* axiPtmeConfig);
-static const uint32_t VC1_OFFSETT = 0x4000;
+  virtual ~PtmeConfig();
-static const uint32_t VC2_OFFSETT = 0x8000;
+
-static const uint32_t VC3_OFFSETT = 0xC000;
+  virtual ReturnValue_t initialize() override;
-#if BOARD_TE0720 == 0
+  /**
-static const char UIO_DEVICE_FILE[] = "/dev/uio1";
+   * @brief Changes the input frequency to the S-Band transceiver and thus the downlink rate
-#else
+   *
-static const char UIO_DEVICE_FILE[] = "/dev/uio1";
+   * @details This is the bitrate of the CADU clock and not the downlink which has twice the bitrate
-#endif
+   *          of the CADU clock due to the convolutional code added by the s-Band transceiver.
-// Bit clock frequency of PMTE IP core in Hz
+   */
-static const uint32_t BIT_CLK_FREQ = 20000000;
+  ReturnValue_t setRate(uint32_t bitRate);
-};  // namespace PtmeConfig
+
+  /**
+   * @brief Will change the time the tx data signal is updated with respect to the tx clock
+   *
+   * @param invert  True -> Data signal will be updated on the falling edge (not desired by the
+   *                Syrlinks)
+   *                False -> Data signal updated on rising edge (default configuration and desired
+   *                by the syrlinks)
+   *
+   * @return        REUTRN_OK if successful, otherwise error return value
+   */
+  ReturnValue_t invertTxClock(bool invert);
+
+  /**
+   * @brief Controls the tx clock manipulator of the PTME wrapper component
+   *
+   * @param enable  Manipulator will be enabled (this is also the default configuration)
+   * @param disable Manipulator will be disabled
+   *
+   * @return        REUTRN_OK if successful, otherwise error return value
+   */
+  ReturnValue_t configTxManipulator(bool enable);
+
+ private:
+  static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;
+
+  //! [EXPORT] : [COMMENT] The commanded rate is not supported by the current FPGA design
+  static const ReturnValue_t RATE_NOT_SUPPORTED = MAKE_RETURN_CODE(0xA0);
+  //! [EXPORT] : [COMMENT] Bad bitrate has been commanded (e.g. 0)
+  static const ReturnValue_t BAD_BIT_RATE = MAKE_RETURN_CODE(0xA1);
+  //! [EXPORT] : [COMMENT] Failed to invert clock and thus change the time the data is updated with respect to the tx clock
+  static const ReturnValue_t CLK_INVERSION_FAILED = MAKE_RETURN_CODE(0xA2);
+  //! [EXPORT] : [COMMENT] Failed to change configuration bit of tx clock manipulator
+  static const ReturnValue_t TX_MANIPULATOR_CONFIG_FAILED  = MAKE_RETURN_CODE(0xA3);
+
+  // Bitrate register field is only 8 bit wide
+  static const uint32_t MAX_BITRATE = 0xFF;
+  // Bit clock frequency of PMTE IP core in Hz
+  static const uint32_t BIT_CLK_FREQ = 20000000;
+
+  AxiPtmeConfig* axiPtmeConfig = nullptr;
+};
 
 #endif /* LINUX_OBC_PTMECONFIG_H_ */

linux/obc/PtmeRateSetter.cpp

@@ -1,27 +0,0 @@
-#include "PtmeRateSetter.h"
-
-#include "fsfw/serviceinterface/ServiceInterface.h"
-
-PtmeRateSetter::PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig)
-    : SystemObject(objectId), ptmeAxiConfig(ptmeAxiConfig) {}
-
-PtmeRateSetter::~PtmeRateSetter() {}
-
-ReturnValue_t PtmeRateSetter::initialize() {
-  if (ptmeAxiConfig == nullptr) {
-    sif::warning << "PtmeRateSetter::initialize: Invalid PtmeAxiConfig object" << std::endl;
-    return HasReturnvaluesIF::RETURN_FAILED;
-  }
-  return HasReturnvaluesIF::RETURN_OK;
-}
-
-ReturnValue_t PtmeRateSetter::setRate(uint32_t bitRate) {
-  if (bitRate == 0) {
-    return BAD_BIT_RATE;
-  }
-  uint32_t rateVal = PtmeConfig::BIT_CLK_FREQ / bitRate - 1;
-  if (rateVal > 0xFF) {
-    return RATE_NOT_SUPPORTED;
-  }
-  return ptmeAxiConfig->writeCaduRateReg(static_cast<uint8_t>(rateVal));
-}

linux/obc/PtmeRateSetter.h

@@ -1,47 +0,0 @@
-#ifndef LINUX_OBC_PTMERATESETTER_H_
-#define LINUX_OBC_PTMERATESETTER_H_
-
-#include "TxRateSetterIF.h"
-#include "fsfw/objectmanager/SystemObject.h"
-#include "fsfw/returnvalues/HasReturnvaluesIF.h"
-#include "linux/obc/PtmeAxiConfig.h"
-#include "linux/obc/PtmeConfig.h"
-
-/**
- * @brief   Class to set the downlink bit rate by writing to the AXI configuration interface of the
- *          PTME IP core.
- *
- * @details This is the bitrate of the CADU clock and not the downlink which has twice the bitrate
- *          of the CADU clock due to the convolutional code added by the s-Band transceiver.
- *
- * @author  J. Meier
- */
-class PtmeRateSetter : public TxRateSetterIF, public SystemObject, public HasReturnvaluesIF {
- public:
-  /**
-   * @brief Constructor
-   *
-   * objectId       Object id of system object
-   * ptmeAxiConfig  Pointer to object providing access to PTME configuration registers.
-   */
-  PtmeRateSetter(object_id_t objectId, PtmeAxiConfig* ptmeAxiConfig);
-  virtual ~PtmeRateSetter();
-
-  virtual ReturnValue_t initialize() override;
-  virtual ReturnValue_t setRate(uint32_t bitRate);
-
- private:
-  static const uint8_t INTERFACE_ID = CLASS_ID::RATE_SETTER;
-
-  //! [EXPORT] : [COMMENT] The commanded rate is not supported by the current FPGA design
-  static const ReturnValue_t RATE_NOT_SUPPORTED = MAKE_RETURN_CODE(0xA0);
-  //! [EXPORT] : [COMMENT] Bad bitrate has been commanded (e.g. 0)
-  static const ReturnValue_t BAD_BIT_RATE = MAKE_RETURN_CODE(0xA1);
-
-  // Bitrate register field is only 8 bit wide
-  static const uint32_t MAX_BITRATE = 0xFF;
-
-  PtmeAxiConfig* ptmeAxiConfig = nullptr;
-};
-
-#endif /* LINUX_OBC_PTMERATESETTER_H_ */

linux/obc/TxRateSetterIF.h

@@ -1,20 +0,0 @@
-#ifndef LINUX_OBC_TXRATESETTERIF_H_
-#define LINUX_OBC_TXRATESETTERIF_H_
-
-#include "fsfw/returnvalues/HasReturnvaluesIF.h"
-
-/**
- * @brief  Abstract class for objects implementing the functionality to switch the
- *         downlink bit rate.
- *
- * @author  J. Meier
- */
-class TxRateSetterIF {
- public:
-  TxRateSetterIF(){};
-  virtual ~TxRateSetterIF(){};
-
-  virtual ReturnValue_t setRate(uint32_t bitRate) = 0;
-};
-
-#endif /* LINUX_OBC_TXRATESETTERIF_H_ */

mission/tmtc/CCSDSHandler.cpp

@@ -1,6 +1,7 @@
 #include "CCSDSHandler.h"
 
 #include <linux/obc/PdecHandler.h>
+#include <linux/obc/PtmeConfig.h>
 
 #include "fsfw/events/EventManagerIF.h"
 #include "fsfw/ipc/QueueFactory.h"
@@ -10,14 +11,14 @@
 #include "fsfw/serviceinterface/serviceInterfaceDefintions.h"
 
 CCSDSHandler::CCSDSHandler(object_id_t objectId, object_id_t ptmeId, object_id_t tcDestination,
-                           TxRateSetterIF* txRateSetterIF, GpioIF* gpioIF, gpioId_t enTxClock,
+                           PtmeConfig* ptmeConfig, GpioIF* gpioIF, gpioId_t enTxClock,
                            gpioId_t enTxData)
     : SystemObject(objectId),
       ptmeId(ptmeId),
       tcDestination(tcDestination),
       parameterHelper(this),
       actionHelper(this, nullptr),
-      txRateSetterIF(txRateSetterIF),
+      ptmeConfig(ptmeConfig),
       gpioIF(gpioIF),
       enTxClock(enTxClock),
       enTxData(enTxData) {
@@ -111,6 +112,15 @@ ReturnValue_t CCSDSHandler::initialize() {
 #endif
     return result;
   }
+  result = ptmeConfig->initialize();
+  if (result != RETURN_OK) {
+    return ObjectManagerIF::CHILD_INIT_FAILED;
+  }
+
+#if OBSW_SYRLINKS_SIMULATED == 1
+  ptmeConfig->invertTxClock(true);
+#endif /* OBSW_SYRLINKS_SIMULATED == 1*/
+
   return result;
 }
 
@@ -193,27 +203,43 @@ ReturnValue_t CCSDSHandler::executeAction(ActionId_t actionId, MessageQueueId_t
   ReturnValue_t result = RETURN_OK;
   switch (actionId) {
     case SET_LOW_RATE: {
-      result = txRateSetterIF->setRate(RATE_100KBPS);
+      result = ptmeConfig->setRate(RATE_100KBPS);
       break;
     }
     case SET_HIGH_RATE: {
-      result = txRateSetterIF->setRate(RATE_500KBPS);
+      result = ptmeConfig->setRate(RATE_500KBPS);
       break;
     }
     case ARBITRARY_RATE: {
       uint32_t bitrate = 0;
       SerializeAdapter::deSerialize(&bitrate, &data, &size, SerializeIF::Endianness::BIG);
-      result = txRateSetterIF->setRate(bitrate);
+      result = ptmeConfig->setRate(bitrate);
       break;
     }
     case EN_TRANSMITTER: {
       enableTransmit();
       return EXECUTION_FINISHED;
     }
-    case DIS_TRANSMITTER: {
+    case DISABLE_TRANSMITTER: {
       disableTransmit();
       return EXECUTION_FINISHED;
     }
+    case ENABLE_TX_CLK_MANIPULATOR: {
+      result = ptmeConfig->configTxManipulator(true);
+      break;
+    }
+    case DISABLE_TX_CLK_MANIPULATOR: {
+      result = ptmeConfig->configTxManipulator(false);
+      break;
+    }
+    case UPDATE_ON_RISING_EDGE: {
+      result = ptmeConfig->invertTxClock(false);
+      break;
+    }
+    case UPDATE_ON_FALLING_EDGE: {
+      result = ptmeConfig->invertTxClock(true);
+      break;
+    }
     default:
       return COMMAND_NOT_IMPLEMENTED;
   }

mission/tmtc/CCSDSHandler.h

@@ -17,7 +17,7 @@
 #include "fsfw/tmtcservices/AcceptsTelemetryIF.h"
 #include "fsfw_hal/common/gpio/GpioIF.h"
 #include "fsfw_hal/common/gpio/gpioDefinitions.h"
-#include "linux/obc/TxRateSetterIF.h"
+#include "linux/obc/PtmeConfig.h"
 
 /**
  * @brief   This class handles the data exchange with the CCSDS IP cores implemented in the
@@ -51,7 +51,7 @@ class CCSDSHandler : public SystemObject,
    * @param enTxData  GPIO ID of RS485 tx data enable
    */
   CCSDSHandler(object_id_t objectId, object_id_t ptmeId, object_id_t tcDestination,
-               TxRateSetterIF* txRateSetterIF, GpioIF* gpioIF, gpioId_t enTxClock,
+               PtmeConfig* ptmeConfig, GpioIF* gpioIF, gpioId_t enTxClock,
                gpioId_t enTxData);
 
   ~CCSDSHandler();
@@ -87,8 +87,14 @@ class CCSDSHandler : public SystemObject,
   static const ActionId_t SET_LOW_RATE = 0;
   static const ActionId_t SET_HIGH_RATE = 1;
   static const ActionId_t EN_TRANSMITTER = 2;
-  static const ActionId_t DIS_TRANSMITTER = 3;
+  static const ActionId_t DISABLE_TRANSMITTER = 3;
   static const ActionId_t ARBITRARY_RATE = 4;
+  static const ActionId_t ENABLE_TX_CLK_MANIPULATOR = 5;
+  static const ActionId_t DISABLE_TX_CLK_MANIPULATOR = 6;
+  // Will update data with respect to tx clock signal of cadu bitsream on rising edge
+  static const ActionId_t UPDATE_ON_RISING_EDGE = 7;
+  // Will update data with respect to tx clock signal of cadu bitsream on falling edge
+  static const ActionId_t UPDATE_ON_FALLING_EDGE = 8;
 
   // Syrlinks supports two bitrates (200 kbps and 1000 kbps)
   // Due to convolutional code added by the syrlinks the input frequency must be half the
@@ -129,7 +135,7 @@ class CCSDSHandler : public SystemObject,
 
   MessageQueueId_t tcDistributorQueueId;
 
-  TxRateSetterIF* txRateSetterIF = nullptr;
+  PtmeConfig* ptmeConfig = nullptr;
 
   GpioIF* gpioIF = nullptr;
   gpioId_t enTxClock = gpio::NO_GPIO;

tmtc

@@ -1 +1 @@
-Subproject commit b06211d0865f5d904572635340303d8b4aec30eb
+Subproject commit c50ef12729309f9851d91621e2f289d574735ab8