v1.10.0 #220
@ -54,12 +54,12 @@ static constexpr char HEATER_6[] = "heater6";
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static constexpr char HEATER_7[] = "heater7";
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static constexpr char HEATER_7[] = "heater7";
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static constexpr char SA_DPL_PIN_0[] = "sa_dpl_0";
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static constexpr char SA_DPL_PIN_0[] = "sa_dpl_0";
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static constexpr char SA_DPL_PIN_1[] = "sa_dpl_1";
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static constexpr char SA_DPL_PIN_1[] = "sa_dpl_1";
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static constexpr char SPI_MUX_BIT_1_PIN[] = "spi_mux_bit_1";
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static constexpr char SPI_MUX_BIT_0_PIN[] = "spi_mux_bit_1";
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static constexpr char SPI_MUX_BIT_2_PIN[] = "spi_mux_bit_2";
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static constexpr char SPI_MUX_BIT_1_PIN[] = "spi_mux_bit_2";
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static constexpr char SPI_MUX_BIT_3_PIN[] = "spi_mux_bit_3";
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static constexpr char SPI_MUX_BIT_2_PIN[] = "spi_mux_bit_3";
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static constexpr char SPI_MUX_BIT_4_PIN[] = "spi_mux_bit_4";
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static constexpr char SPI_MUX_BIT_3_PIN[] = "spi_mux_bit_4";
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static constexpr char SPI_MUX_BIT_5_PIN[] = "spi_mux_bit_5";
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static constexpr char SPI_MUX_BIT_4_PIN[] = "spi_mux_bit_5";
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static constexpr char SPI_MUX_BIT_6_PIN[] = "spi_mux_bit_6";
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static constexpr char SPI_MUX_BIT_5_PIN[] = "spi_mux_bit_6";
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static constexpr char EN_RW_CS[] = "en_rw_cs";
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static constexpr char EN_RW_CS[] = "en_rw_cs";
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static constexpr char EN_RW_1[] = "enable_rw_1";
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static constexpr char EN_RW_1[] = "enable_rw_1";
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static constexpr char EN_RW_2[] = "enable_rw_2";
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static constexpr char EN_RW_2[] = "enable_rw_2";
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@ -25,38 +25,28 @@ void initSpiCsDecoder(GpioIF* gpioComIF) {
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GpiodRegularByLineName* spiMuxBit = nullptr;
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GpiodRegularByLineName* spiMuxBit = nullptr;
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/** Setting mux bit 1 to low will disable IC21 on the interface board */
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/** Setting mux bit 1 to low will disable IC21 on the interface board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_0_PIN, "SPI Mux Bit 1",
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gpio::DIR_OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_0, spiMuxBit);
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/** Setting mux bit 2 to low disables IC1 on the TCS board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 2",
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gpio::DIR_OUT, gpio::HIGH);
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gpio::DIR_OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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/** Setting mux bit 2 to low disables IC1 on the TCS board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2",
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gpio::DIR_OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 3",
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 3",
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gpio::DIR_OUT, gpio::LOW);
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gpio::DIR_OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_1_PIN, "SPI Mux Bit 1",
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// gpio::OUT, gpio::LOW);
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// spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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// /** Setting mux bit 2 to low disables IC1 on the TCS board */
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// spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_2_PIN, "SPI Mux Bit 2",
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// gpio::OUT, gpio::HIGH); spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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// /** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board
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// */ spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit
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// 3", gpio::OUT, gpio::LOW); spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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/** The following gpios can take arbitrary initial values */
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/** The following gpios can take arbitrary initial values */
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 4",
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_3_PIN, "SPI Mux Bit 4",
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gpio::DIR_OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_4_PIN, "SPI Mux Bit 5",
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gpio::DIR_OUT, gpio::LOW);
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gpio::DIR_OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 5",
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_5_PIN, "SPI Mux Bit 6",
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gpio::DIR_OUT, gpio::LOW);
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gpio::DIR_OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
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spiMuxBit = new GpiodRegularByLineName(q7s::gpioNames::SPI_MUX_BIT_6_PIN, "SPI Mux Bit 6",
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gpio::DIR_OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_6, spiMuxBit);
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GpiodRegularByLineName* enRwDecoder =
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GpiodRegularByLineName* enRwDecoder =
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new GpiodRegularByLineName(q7s::gpioNames::EN_RW_CS, "EN_RW_CS", gpio::DIR_OUT, gpio::HIGH);
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new GpiodRegularByLineName(q7s::gpioNames::EN_RW_CS, "EN_RW_CS", gpio::DIR_OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
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spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
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@ -307,45 +297,45 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
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break;
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break;
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}
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}
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case (gpioIds::CS_SUS_2): {
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case (gpioIds::CS_SUS_2): {
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selectY0();
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selectY2();
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enableDecoderInterfaceBoardIc2();
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enableDecoderInterfaceBoardIc1();
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break;
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break;
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}
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}
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case (gpioIds::CS_SUS_3): {
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case (gpioIds::CS_SUS_3): {
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selectY1();
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selectY3();
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enableDecoderInterfaceBoardIc2();
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enableDecoderInterfaceBoardIc1();
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break;
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break;
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}
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}
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case (gpioIds::CS_SUS_4): {
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case (gpioIds::CS_SUS_4): {
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selectY2();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_5): {
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selectY2();
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enableDecoderInterfaceBoardIc1();
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break;
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}
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case (gpioIds::CS_SUS_6): {
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selectY3();
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enableDecoderInterfaceBoardIc1();
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break;
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}
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case (gpioIds::CS_SUS_7): {
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selectY3();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_8): {
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selectY4();
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selectY4();
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enableDecoderInterfaceBoardIc1();
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enableDecoderInterfaceBoardIc1();
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break;
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break;
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}
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}
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case (gpioIds::CS_SUS_9): {
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case (gpioIds::CS_SUS_5): {
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selectY5();
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selectY5();
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enableDecoderInterfaceBoardIc1();
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enableDecoderInterfaceBoardIc1();
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break;
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break;
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}
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}
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case (gpioIds::CS_SUS_6): {
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selectY0();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_7): {
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selectY1();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_8): {
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selectY2();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_9): {
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selectY3();
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enableDecoderInterfaceBoardIc2();
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break;
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}
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case (gpioIds::CS_SUS_10): {
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case (gpioIds::CS_SUS_10): {
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selectY4();
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selectY4();
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enableDecoderInterfaceBoardIc2();
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enableDecoderInterfaceBoardIc2();
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@ -385,52 +375,52 @@ void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, gpio::Lev
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}
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}
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void enableDecoderTcsIc1() {
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void enableDecoderTcsIc1() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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}
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}
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void enableDecoderTcsIc2() {
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void enableDecoderTcsIc2() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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}
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void enableDecoderInterfaceBoardIc1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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}
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void enableDecoderInterfaceBoardIc2() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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}
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}
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void enableDecoderInterfaceBoardIc1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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void enableDecoderInterfaceBoardIc2() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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}
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void disableDecoderTcsIc1() {
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void disableDecoderTcsIc1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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}
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void disableDecoderTcsIc2() {
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void disableDecoderTcsIc2() {
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// DO NOT CHANGE THE ORDER HERE
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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}
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}
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void disableDecoderInterfaceBoardIc1() {
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void disableDecoderInterfaceBoardIc1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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}
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void disableDecoderInterfaceBoardIc2() {
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void disableDecoderInterfaceBoardIc2() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_0);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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}
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void enableRwDecoder() { gpioComInterface->pullHigh(gpioIds::EN_RW_CS); }
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void enableRwDecoder() { gpioComInterface->pullHigh(gpioIds::EN_RW_CS); }
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@ -438,57 +428,57 @@ void enableRwDecoder() { gpioComInterface->pullHigh(gpioIds::EN_RW_CS); }
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void disableRwDecoder() { gpioComInterface->pullLow(gpioIds::EN_RW_CS); }
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void disableRwDecoder() { gpioComInterface->pullLow(gpioIds::EN_RW_CS); }
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void selectY0() {
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void selectY0() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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||||||
}
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}
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||||||
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||||||
void selectY1() {
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void selectY1() {
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||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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||||||
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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||||||
}
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}
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||||||
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||||||
void selectY2() {
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void selectY2() {
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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||||||
}
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}
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||||||
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||||||
void selectY3() {
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void selectY3() {
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||||||
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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||||||
}
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}
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||||||
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||||||
void selectY4() {
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void selectY4() {
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||||||
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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|
||||||
}
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}
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||||||
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||||||
void selectY5() {
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void selectY5() {
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
|
||||||
}
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}
|
||||||
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|
||||||
void selectY6() {
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void selectY6() {
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
||||||
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void selectY7() {
|
void selectY7() {
|
||||||
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
|
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
|
||||||
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void disableAllDecoder() {
|
void disableAllDecoder() {
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
|
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
|
||||||
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_0);
|
||||||
|
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
|
||||||
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
|
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -131,6 +131,7 @@ ReturnValue_t SusHandler::interpretDeviceReply(DeviceCommandId_t id, const uint8
|
|||||||
case SUS::READ_CONVERSIONS: {
|
case SUS::READ_CONVERSIONS: {
|
||||||
PoolReadGuard readSet(&dataset);
|
PoolReadGuard readSet(&dataset);
|
||||||
dataset.temperatureCelcius = (*(packet) << 8 | *(packet + 1)) * 0.125;
|
dataset.temperatureCelcius = (*(packet) << 8 | *(packet + 1)) * 0.125;
|
||||||
|
//dataset.temperatureCelcius = ((packet[1] << 8) | packet[2]) * 0.125;
|
||||||
dataset.ain0 = (*(packet + 2) << 8 | *(packet + 3));
|
dataset.ain0 = (*(packet + 2) << 8 | *(packet + 3));
|
||||||
dataset.ain1 = (*(packet + 4) << 8 | *(packet + 5));
|
dataset.ain1 = (*(packet + 4) << 8 | *(packet + 5));
|
||||||
dataset.ain2 = (*(packet + 6) << 8 | *(packet + 7));
|
dataset.ain2 = (*(packet + 6) << 8 | *(packet + 7));
|
||||||
|
@ -67,12 +67,12 @@ enum gpioId_t {
|
|||||||
CS_SUS_10,
|
CS_SUS_10,
|
||||||
CS_SUS_11,
|
CS_SUS_11,
|
||||||
|
|
||||||
|
SPI_MUX_BIT_0,
|
||||||
SPI_MUX_BIT_1,
|
SPI_MUX_BIT_1,
|
||||||
SPI_MUX_BIT_2,
|
SPI_MUX_BIT_2,
|
||||||
SPI_MUX_BIT_3,
|
SPI_MUX_BIT_3,
|
||||||
SPI_MUX_BIT_4,
|
SPI_MUX_BIT_4,
|
||||||
SPI_MUX_BIT_5,
|
SPI_MUX_BIT_5,
|
||||||
SPI_MUX_BIT_6,
|
|
||||||
|
|
||||||
CS_RAD_SENSOR,
|
CS_RAD_SENSOR,
|
||||||
|
|
||||||
|
@ -162,8 +162,8 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
bool addSus5 = false;
|
bool addSus5 = false;
|
||||||
bool addSus6 = false;
|
bool addSus6 = false;
|
||||||
bool addSus7 = false;
|
bool addSus7 = false;
|
||||||
bool addSus8 = true;
|
bool addSus8 = false;
|
||||||
bool addSus9 = false;
|
bool addSus9 = true;
|
||||||
bool addSus10 = false;
|
bool addSus10 = false;
|
||||||
bool addSus11 = false;
|
bool addSus11 = false;
|
||||||
/**
|
/**
|
||||||
@ -340,7 +340,8 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
if (addSus8) {
|
if (addSus8) {
|
||||||
/* Write setup */
|
/* Write setup */
|
||||||
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::SUS_8, length * 0.921, SusHandler::FIRST_WRITE);
|
//thisSequence->addSlot(objects::SUS_8, length * 0.921, SusHandler::FIRST_WRITE);
|
||||||
|
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::SUS_8, length * 0.921, DeviceHandlerIF::GET_READ);
|
||||||
@ -361,18 +362,19 @@ ReturnValue_t pst::pstSpi(FixedTimeslotTaskIF *thisSequence) {
|
|||||||
if (addSus9) {
|
if (addSus9) {
|
||||||
/* Write setup */
|
/* Write setup */
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.924, SusHandler::FIRST_WRITE);
|
//thisSequence->addSlot(objects::SUS_9, length * 0.924, SusHandler::FIRST_WRITE);
|
||||||
|
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::SUS_9, length * 0.924, DeviceHandlerIF::GET_READ);
|
||||||
/* Start ADC conversions */
|
/* Start ADC conversions */
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::PERFORM_OPERATION);
|
//thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::SUS_9, length * 0.925, DeviceHandlerIF::GET_READ);
|
||||||
/* Read ADC conversions */
|
/* Read ADC conversions */
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::PERFORM_OPERATION);
|
//thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::SEND_WRITE);
|
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::SEND_READ);
|
thisSequence->addSlot(objects::SUS_9, length * 0.926, DeviceHandlerIF::SEND_READ);
|
||||||
|
Loading…
Reference in New Issue
Block a user