v1.16.0 #323

Merged
muellerr merged 223 commits from develop into main 2022-11-18 14:23:24 +01:00
4 changed files with 16 additions and 3 deletions
Showing only changes of commit b5d3422d90 - Show all commits

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@ -31,3 +31,8 @@ uint32_t PdecConfig::getConfigWord(uint8_t wordNo) {
} }
return configWords[wordNo]; return configWords[wordNo];
} }
uint32_t PdecConfig::getImrReg() {
return static_cast<uint32_t>(enableNewFarIrq << 2) | static_cast<uint32_t>(enableTcAbortIrq << 1)
| static_cast<uint32_t>(enableTcNewIrq);
}

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@ -23,6 +23,7 @@ class PdecConfig {
* @brief Returns the configuration word by specifying the position. * @brief Returns the configuration word by specifying the position.
*/ */
uint32_t getConfigWord(uint8_t wordNo); uint32_t getConfigWord(uint8_t wordNo);
uint32_t getImrReg();
private: private:
// TC transfer frame configuration parameters // TC transfer frame configuration parameters
@ -45,6 +46,9 @@ class PdecConfig {
static const uint8_t CONFIG_WORDS_NUM = 2; static const uint8_t CONFIG_WORDS_NUM = 2;
uint32_t configWords[CONFIG_WORDS_NUM]; uint32_t configWords[CONFIG_WORDS_NUM];
bool enableTcNewIrq = true;
bool enableTcAbortIrq = true;
bool enableNewFarIrq = true;
void initialize(); void initialize();
}; };

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@ -86,10 +86,12 @@ void PdecHandler::writePdecConfig() {
*(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0); *(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
*(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1); *(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
// Configure interrupt mask register to enable interrupts
(*memoryBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
// Configure all MAP IDs as invalid // Configure all MAP IDs as invalid
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) { for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
// TODO: adding 1 / 4 results in + 0. Check correctness *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) =
*(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx + 1 / 4) =
NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION; NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
} }
@ -100,10 +102,10 @@ void PdecHandler::writePdecConfig() {
// Write map id clock frequencies // Write map id clock frequencies
for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) { for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
// TODO: adding 1 / 4 results in + 0. Check correctness
*(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) = *(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) =
MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ; MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
} }
} }
ReturnValue_t PdecHandler::resetFarStatFlag() { ReturnValue_t PdecHandler::resetFarStatFlag() {

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@ -147,6 +147,8 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
* UIO is 4 byte aligned. Thus offset is calculated with "true offset" / 4 * UIO is 4 byte aligned. Thus offset is calculated with "true offset" / 4
* Example: PDEC_FAR = 0x2840 => Offset in virtual address space is 0xA10 * Example: PDEC_FAR = 0x2840 => Offset in virtual address space is 0xA10
*/ */
static constexpr uint32_t PDEC_PIR_OFFSET = 0xA03;
static constexpr uint32_t PDEC_IMR_OFFSET = 0xA04;
static const uint32_t PDEC_FAR_OFFSET = 0xA10; static const uint32_t PDEC_FAR_OFFSET = 0xA10;
static const uint32_t PDEC_CLCW_OFFSET = 0xA12; static const uint32_t PDEC_CLCW_OFFSET = 0xA12;
static const uint32_t PDEC_BFREE_OFFSET = 0xA24; static const uint32_t PDEC_BFREE_OFFSET = 0xA24;