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@ -193,102 +193,102 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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if (cfg.scheduleAcsBoard) {
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if (cfg.scheduleAcsBoard) {
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if (enableAside) {
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if (enableAside) {
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// A side
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// A side
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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}
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}
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if (enableBside) {
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if (enableBside) {
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// B side
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// B side
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD,
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length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::acs::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::acs::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_1_PERIOD,
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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}
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}
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}
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}
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@ -616,19 +616,19 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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}
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}
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thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::acs::SCHED_BLOCK_2_PERIOD, 0);
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thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::acs::SCHED_BLOCK_3_PERIOD, 0);
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if (cfg.scheduleImtq) {
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if (cfg.scheduleImtq) {
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// This is the torquing cycle.
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// This is the torquing cycle.
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::IMTQ_HANDLER, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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}
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}
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@ -711,94 +711,94 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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if (cfg.scheduleRws) {
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if (cfg.scheduleRws) {
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// this is the torquing cycle
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// this is the torquing cycle
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thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
|
|
|
|
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW1, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW2, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW3, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_2_PERIOD,
|
|
|
|
thisSequence->addSlot(objects::RW4, length * config::acs::SCHED_BLOCK_4_PERIOD,
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|