Syrlinks Assembly #414
@ -27,6 +27,10 @@ will consitute of a breaking change warranting a new major release:
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- IMTQ: Sets were filled with wrong data, e.g. Raw MTM was filled with calibrated MTM measurements.
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- IMTQ: Sets were filled with wrong data, e.g. Raw MTM was filled with calibrated MTM measurements.
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- Set RM3100 dataset to valid.
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- Set RM3100 dataset to valid.
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## Added
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- Added Syrlinks Assembly object to allow recovery handling and to fix faulty FDIR behaviour.
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# [v1.33.0]
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# [v1.33.0]
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eive-tmtc: v2.16.2
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eive-tmtc: v2.16.2
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@ -19,8 +19,8 @@ class LocalParameterHandler : public NVMParameterBase {
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* @brief Constructor
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* @brief Constructor
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*
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*
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* @param sdRelativeName Absolute name of json file relative to mount
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* @param sdRelativeName Absolute name of json file relative to mount
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* directory of SD card.
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* directory of SD
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* E.g. conf/example.json
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* card. E.g. conf/example.json
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* @param sdcMan Pointer to SD card manager
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* @param sdcMan Pointer to SD card manager
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*/
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*/
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LocalParameterHandler(std::string sdRelativeName, SdCardMountedIF* sdcMan);
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LocalParameterHandler(std::string sdRelativeName, SdCardMountedIF* sdcMan);
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@ -83,7 +83,7 @@ static constexpr float SCHED_BLOCK_7_PERIOD = static_cast<float>(SCHED_BLOCK_7_R
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static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
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static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
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static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
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static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
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} // namespace acs
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} // namespace spiSched
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} // namespace config
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} // namespace config
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@ -251,53 +251,77 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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}
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if (cfg.scheduleStr) {
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if (cfg.scheduleStr) {
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@ -313,15 +337,20 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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if (cfg.scheduleAcsBoard) {
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if (cfg.scheduleAcsBoard) {
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if (enableAside) {
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if (enableAside) {
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// A side
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// A side
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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|
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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@ -331,23 +360,31 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
|
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
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DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
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DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
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DeviceHandlerIF::GET_READ);
|
||||||
}
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}
|
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if (enableBside) {
|
if (enableBside) {
|
||||||
// B side
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// B side
|
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::GET_WRITE);
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
|
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
@ -357,11 +394,14 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
if (enableAside) {
|
if (enableAside) {
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
@ -371,21 +411,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
|
||||||
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::GET_WRITE);
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
|
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
if (enableBside) {
|
if (enableBside) {
|
||||||
@ -396,21 +444,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
|
||||||
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::GET_WRITE);
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
|
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -429,7 +485,8 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
imtq::ComStep::READ_MEASURE_GET);
|
imtq::ComStep::READ_MEASURE_GET);
|
||||||
}
|
}
|
||||||
|
|
||||||
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD, 0);
|
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD,
|
||||||
|
0);
|
||||||
|
|
||||||
if (cfg.scheduleImtq) {
|
if (cfg.scheduleImtq) {
|
||||||
// This is the torquing cycle.
|
// This is the torquing cycle.
|
||||||
@ -491,23 +548,34 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
|
|
||||||
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD, 0);
|
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD,
|
||||||
|
0);
|
||||||
|
|
||||||
#if OBSW_ADD_PL_PCDU == 1
|
#if OBSW_ADD_PL_PCDU == 1
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if OBSW_ADD_RAD_SENSORS == 1
|
#if OBSW_ADD_RAD_SENSORS == 1
|
||||||
/* Radiation sensor */
|
/* Radiation sensor */
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
#endif
|
#endif
|
||||||
return returnvalue::OK;
|
return returnvalue::OK;
|
||||||
}
|
}
|
||||||
|
Loading…
x
Reference in New Issue
Block a user