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@ -251,53 +251,77 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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if (cfg.scheduleStr) {
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@ -313,15 +337,20 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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if (cfg.scheduleAcsBoard) {
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if (enableAside) {
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// A side
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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@ -331,23 +360,31 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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if (enableBside) {
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// B side
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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@ -357,11 +394,14 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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if (enableAside) {
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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@ -371,21 +411,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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if (enableBside) {
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@ -396,21 +444,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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}
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@ -429,7 +485,8 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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imtq::ComStep::READ_MEASURE_GET);
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}
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thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD, 0);
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thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD,
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0);
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if (cfg.scheduleImtq) {
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// This is the torquing cycle.
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@ -491,23 +548,34 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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DeviceHandlerIF::GET_READ);
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}
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thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD, 0);
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thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD,
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0);
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#if OBSW_ADD_PL_PCDU == 1
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
|
|
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DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
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thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
|
|
|
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DeviceHandlerIF::SEND_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
|
|
|
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DeviceHandlerIF::SEND_READ);
|
|
|
|
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if OBSW_ADD_RAD_SENSORS == 1
|
|
|
|
|
/* Radiation sensor */
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_READ);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_READ);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
|
|
|
|
DeviceHandlerIF::PERFORM_OPERATION);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
|
|
|
|
DeviceHandlerIF::SEND_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
|
|
|
|
DeviceHandlerIF::GET_WRITE);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
|
|
|
|
DeviceHandlerIF::SEND_READ);
|
|
|
|
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
|
|
|
|
DeviceHandlerIF::GET_READ);
|
|
|
|
|
#endif
|
|
|
|
|
return returnvalue::OK;
|
|
|
|
|
}
|
|
|
|
|