IMTQ Assembly #420
@ -1224,7 +1224,7 @@ ReturnValue_t CoreController::handleProtInfoUpdateLine(std::string nextLine) {
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}
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}
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}
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}
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wordIdx++;
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wordIdx++;
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if(wordIdx >= 10) {
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if (wordIdx >= 10) {
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break;
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break;
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}
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}
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}
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}
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@ -8,6 +8,7 @@
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#include <mission/devices/MgmLis3CustomHandler.h>
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#include <mission/devices/MgmLis3CustomHandler.h>
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#include <mission/devices/MgmRm3100CustomHandler.h>
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#include <mission/devices/MgmRm3100CustomHandler.h>
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#include <mission/system/objects/CamSwitcher.h>
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#include <mission/system/objects/CamSwitcher.h>
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#include <mission/system/objects/ImtqAssembly.h>
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#include "OBSWConfig.h"
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#include "OBSWConfig.h"
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#include "bsp_q7s/boardtest/Q7STestTask.h"
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#include "bsp_q7s/boardtest/Q7STestTask.h"
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@ -912,13 +913,16 @@ void ObjectFactory::createStrComponents(PowerSwitchIF* pwrSwitcher) {
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}
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}
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void ObjectFactory::createImtqComponents(PowerSwitchIF* pwrSwitcher) {
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void ObjectFactory::createImtqComponents(PowerSwitchIF* pwrSwitcher) {
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auto* imtqAssy = new ImtqAssembly(objects::IMTQ_ASSY);
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imtqAssy->connectModeTreeParent(satsystem::acs::ACS_SUBSYSTEM);
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new ImtqPollingTask(objects::IMTQ_POLLING);
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new ImtqPollingTask(objects::IMTQ_POLLING);
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I2cCookie* imtqI2cCookie = new I2cCookie(addresses::IMTQ, imtq::MAX_REPLY_SIZE, q7s::I2C_PL_EIVE);
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I2cCookie* imtqI2cCookie = new I2cCookie(addresses::IMTQ, imtq::MAX_REPLY_SIZE, q7s::I2C_PL_EIVE);
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auto imtqHandler = new ImtqHandler(objects::IMTQ_HANDLER, objects::IMTQ_POLLING, imtqI2cCookie,
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auto imtqHandler = new ImtqHandler(objects::IMTQ_HANDLER, objects::IMTQ_POLLING, imtqI2cCookie,
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pcdu::Switches::PDU1_CH3_MGT_5V);
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pcdu::Switches::PDU1_CH3_MGT_5V);
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imtqHandler->enableThermalModule(ThermalStateCfg());
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imtqHandler->enableThermalModule(ThermalStateCfg());
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imtqHandler->setPowerSwitcher(pwrSwitcher);
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imtqHandler->setPowerSwitcher(pwrSwitcher);
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imtqHandler->connectModeTreeParent(satsystem::acs::ACS_SUBSYSTEM);
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imtqHandler->connectModeTreeParent(*imtqAssy);
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static_cast<void>(imtqHandler);
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static_cast<void>(imtqHandler);
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#if OBSW_TEST_IMTQ == 1
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#if OBSW_TEST_IMTQ == 1
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imtqHandler->setStartUpImmediately();
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imtqHandler->setStartUpImmediately();
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@ -83,7 +83,7 @@ static constexpr float SCHED_BLOCK_7_PERIOD = static_cast<float>(SCHED_BLOCK_7_R
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static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
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static constexpr float SCHED_BLOCK_8_PERIOD = static_cast<float>(SCHED_BLOCK_8_PLPCDU_MS) / 400.0;
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static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
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static constexpr float SCHED_BLOCK_9_PERIOD = static_cast<float>(SCHED_BLOCK_9_RAD_SENS_MS) / 400.0;
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} // namespace acs
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} // namespace spiSched
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} // namespace config
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} // namespace config
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@ -144,6 +144,7 @@ enum commonObjects : uint32_t {
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TCS_BOARD_ASS = 0x73000003,
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TCS_BOARD_ASS = 0x73000003,
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RW_ASS = 0x73000004,
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RW_ASS = 0x73000004,
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CAM_SWITCHER = 0x73000006,
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CAM_SWITCHER = 0x73000006,
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IMTQ_ASSY = 0x73000008,
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EIVE_SYSTEM = 0x73010000,
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EIVE_SYSTEM = 0x73010000,
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ACS_SUBSYSTEM = 0x73010001,
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ACS_SUBSYSTEM = 0x73010001,
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PL_SUBSYSTEM = 0x73010002,
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PL_SUBSYSTEM = 0x73010002,
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@ -251,53 +251,77 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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thisSequence->addSlot(objects::SUS_0_N_LOC_XFYFZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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thisSequence->addSlot(objects::SUS_1_N_LOC_XBYFZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_2_N_LOC_XFYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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thisSequence->addSlot(objects::SUS_3_N_LOC_XFYBZF_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_4_N_LOC_XMYFZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_5_N_LOC_XFYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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thisSequence->addSlot(objects::SUS_6_R_LOC_XFYBZM_PT_XF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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thisSequence->addSlot(objects::SUS_7_R_LOC_XBYBZM_PT_XB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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thisSequence->addSlot(objects::SUS_8_R_LOC_XBYBZB_PT_YB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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thisSequence->addSlot(objects::SUS_9_R_LOC_XBYBZB_PT_YF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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thisSequence->addSlot(objects::SUS_10_N_LOC_XMYBZF_PT_ZF,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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thisSequence->addSlot(objects::SUS_11_R_LOC_XBYMZB_PT_ZB,
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length * config::spiSched::SCHED_BLOCK_1_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_1_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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}
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if (cfg.scheduleStr) {
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if (cfg.scheduleStr) {
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@ -313,15 +337,20 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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if (cfg.scheduleAcsBoard) {
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if (cfg.scheduleAcsBoard) {
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if (enableAside) {
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if (enableAside) {
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// A side
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// A side
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_0_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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@ -331,23 +360,31 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_1_RM3100_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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}
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}
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if (enableBside) {
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if (enableBside) {
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// B side
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// B side
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::PERFORM_OPERATION);
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DeviceHandlerIF::PERFORM_OPERATION);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_2_PERIOD,
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DeviceHandlerIF::GET_WRITE);
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DeviceHandlerIF::GET_WRITE);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::SEND_READ);
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DeviceHandlerIF::SEND_READ);
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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thisSequence->addSlot(objects::MGM_2_LIS3_HANDLER,
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length * config::spiSched::SCHED_BLOCK_3_PERIOD,
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DeviceHandlerIF::GET_READ);
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DeviceHandlerIF::GET_READ);
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|
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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@ -357,11 +394,14 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
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DeviceHandlerIF::SEND_WRITE);
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DeviceHandlerIF::SEND_WRITE);
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
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thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
thisSequence->addSlot(objects::MGM_3_RM3100_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
if (enableAside) {
|
if (enableAside) {
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
@ -371,21 +411,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
|
||||||
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::GET_WRITE);
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_0_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
|
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::GYRO_1_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
if (enableBside) {
|
if (enableBside) {
|
||||||
@ -396,21 +444,29 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
length * config::spiSched::SCHED_BLOCK_2_PERIOD, DeviceHandlerIF::GET_WRITE);
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::SEND_READ);
|
|
||||||
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
|
||||||
length * config::spiSched::SCHED_BLOCK_3_PERIOD, DeviceHandlerIF::GET_READ);
|
|
||||||
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::PERFORM_OPERATION);
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::SEND_WRITE);
|
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
|
||||||
DeviceHandlerIF::GET_WRITE);
|
DeviceHandlerIF::GET_WRITE);
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_READ);
|
||||||
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER, length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
thisSequence->addSlot(objects::GYRO_2_ADIS_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
|
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_2_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::GYRO_3_L3G_HANDLER,
|
||||||
|
length * config::spiSched::SCHED_BLOCK_3_PERIOD,
|
||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -429,7 +485,8 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
imtq::ComStep::READ_MEASURE_GET);
|
imtq::ComStep::READ_MEASURE_GET);
|
||||||
}
|
}
|
||||||
|
|
||||||
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD, 0);
|
thisSequence->addSlot(objects::ACS_CONTROLLER, length * config::spiSched::SCHED_BLOCK_4_PERIOD,
|
||||||
|
0);
|
||||||
|
|
||||||
if (cfg.scheduleImtq) {
|
if (cfg.scheduleImtq) {
|
||||||
// This is the torquing cycle.
|
// This is the torquing cycle.
|
||||||
@ -491,23 +548,34 @@ ReturnValue_t pst::pstTcsAndAcs(FixedTimeslotTaskIF *thisSequence, AcsPstCfg cfg
|
|||||||
DeviceHandlerIF::GET_READ);
|
DeviceHandlerIF::GET_READ);
|
||||||
}
|
}
|
||||||
|
|
||||||
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD, 0);
|
thisSequence->addSlot(objects::SPI_RTD_COM_IF, length * config::spiSched::SCHED_BLOCK_RTD_PERIOD,
|
||||||
|
0);
|
||||||
|
|
||||||
#if OBSW_ADD_PL_PCDU == 1
|
#if OBSW_ADD_PL_PCDU == 1
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::PLPCDU_HANDLER, length * config::spiSched::SCHED_BLOCK_8_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if OBSW_ADD_RAD_SENSORS == 1
|
#if OBSW_ADD_RAD_SENSORS == 1
|
||||||
/* Radiation sensor */
|
/* Radiation sensor */
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::PERFORM_OPERATION);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_WRITE);
|
DeviceHandlerIF::PERFORM_OPERATION);
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_WRITE);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::SEND_READ);
|
DeviceHandlerIF::SEND_WRITE);
|
||||||
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD, DeviceHandlerIF::GET_READ);
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_WRITE);
|
||||||
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::SEND_READ);
|
||||||
|
thisSequence->addSlot(objects::RAD_SENSOR, length * config::spiSched::SCHED_BLOCK_9_PERIOD,
|
||||||
|
DeviceHandlerIF::GET_READ);
|
||||||
#endif
|
#endif
|
||||||
return returnvalue::OK;
|
return returnvalue::OK;
|
||||||
}
|
}
|
||||||
|
@ -849,7 +849,7 @@ void ImtqHandler::fillCalibratedMtmDataset(const uint8_t* packet) {
|
|||||||
|
|
||||||
void ImtqHandler::fillRawMtmDataset(imtq::RawMtmMeasurementSet& set, const uint8_t* packet) {
|
void ImtqHandler::fillRawMtmDataset(imtq::RawMtmMeasurementSet& set, const uint8_t* packet) {
|
||||||
PoolReadGuard rg(&set);
|
PoolReadGuard rg(&set);
|
||||||
if(rg.getReadResult() != returnvalue::OK) {
|
if (rg.getReadResult() != returnvalue::OK) {
|
||||||
sif::error << "ImtqHandler::fillRawMtmDataset: Lock failure" << std::endl;
|
sif::error << "ImtqHandler::fillRawMtmDataset: Lock failure" << std::endl;
|
||||||
}
|
}
|
||||||
unsigned int offset = 2;
|
unsigned int offset = 2;
|
||||||
|
@ -3,6 +3,7 @@
|
|||||||
|
|
||||||
#include <eive/eventSubsystemIds.h>
|
#include <eive/eventSubsystemIds.h>
|
||||||
#include <eive/resultClassIds.h>
|
#include <eive/resultClassIds.h>
|
||||||
|
|
||||||
#include "fsfw/devicehandlers/DeviceHandlerBase.h"
|
#include "fsfw/devicehandlers/DeviceHandlerBase.h"
|
||||||
#include "fsfw/globalfunctions/PeriodicOperationDivider.h"
|
#include "fsfw/globalfunctions/PeriodicOperationDivider.h"
|
||||||
#include "mission/devices/devicedefinitions/acsPolling.h"
|
#include "mission/devices/devicedefinitions/acsPolling.h"
|
||||||
|
@ -7,6 +7,7 @@ target_sources(
|
|||||||
TcsSubsystem.cpp
|
TcsSubsystem.cpp
|
||||||
PayloadSubsystem.cpp
|
PayloadSubsystem.cpp
|
||||||
AcsBoardAssembly.cpp
|
AcsBoardAssembly.cpp
|
||||||
|
ImtqAssembly.cpp
|
||||||
Stack5VHandler.cpp
|
Stack5VHandler.cpp
|
||||||
SusAssembly.cpp
|
SusAssembly.cpp
|
||||||
RwAssembly.cpp
|
RwAssembly.cpp
|
||||||
|
@ -1 +1,46 @@
|
|||||||
#include "ImtqAssembly.h"
|
#include "ImtqAssembly.h"
|
||||||
|
|
||||||
|
#include <eive/objects.h>
|
||||||
|
|
||||||
|
using namespace returnvalue;
|
||||||
|
|
||||||
|
ImtqAssembly::ImtqAssembly(object_id_t objectId) : AssemblyBase(objectId) {}
|
||||||
|
|
||||||
|
ReturnValue_t ImtqAssembly::commandChildren(Mode_t mode, Submode_t submode) {
|
||||||
|
commandTable[0].setMode(mode);
|
||||||
|
commandTable[0].setSubmode(submode);
|
||||||
|
if (recoveryState == RECOVERY_IDLE) {
|
||||||
|
ReturnValue_t result = checkAndHandleHealthState(mode, submode);
|
||||||
|
if (result == NEED_TO_CHANGE_HEALTH) {
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
HybridIterator<ModeListEntry> iter(commandTable.begin(), commandTable.end());
|
||||||
|
executeTable(iter);
|
||||||
|
return returnvalue::OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
ReturnValue_t ImtqAssembly::checkChildrenStateOn(Mode_t wantedMode, Submode_t wantedSubmode) {
|
||||||
|
if (childrenMap[objects::IMTQ_HANDLER].mode != wantedMode) {
|
||||||
|
return NOT_ENOUGH_CHILDREN_IN_CORRECT_STATE;
|
||||||
|
}
|
||||||
|
return returnvalue::OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
ReturnValue_t ImtqAssembly::isModeCombinationValid(Mode_t mode, Submode_t submode) {
|
||||||
|
if (mode == MODE_ON or mode == DeviceHandlerIF::MODE_NORMAL or mode == MODE_OFF) {
|
||||||
|
return returnvalue::OK;
|
||||||
|
}
|
||||||
|
return returnvalue::FAILED;
|
||||||
|
}
|
||||||
|
|
||||||
|
ReturnValue_t ImtqAssembly::checkAndHandleHealthState(Mode_t deviceMode, Submode_t deviceSubmode) {
|
||||||
|
HealthState health = healthHelper.healthTable->getHealth(objects::SYRLINKS_HANDLER);
|
||||||
|
if (health == FAULTY or health == PERMANENT_FAULTY) {
|
||||||
|
overwriteDeviceHealth(objects::SYRLINKS_HANDLER, health);
|
||||||
|
return NEED_TO_CHANGE_HEALTH;
|
||||||
|
} else if (health == EXTERNAL_CONTROL) {
|
||||||
|
modeHelper.setForced(true);
|
||||||
|
}
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
@ -1,15 +1,17 @@
|
|||||||
/*
|
#pragma once
|
||||||
* ImtqAssembly.h
|
|
||||||
*
|
|
||||||
* Created on: Mar 2, 2023
|
|
||||||
* Author: rmueller
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef MISSION_SYSTEM_OBJECTS_IMTQASSEMBLY_H_
|
#include <fsfw/devicehandlers/AssemblyBase.h>
|
||||||
#define MISSION_SYSTEM_OBJECTS_IMTQASSEMBLY_H_
|
|
||||||
|
|
||||||
|
class ImtqAssembly : public AssemblyBase {
|
||||||
|
public:
|
||||||
|
ImtqAssembly(object_id_t objectId);
|
||||||
|
|
||||||
|
private:
|
||||||
|
FixedArrayList<ModeListEntry, 1> commandTable;
|
||||||
|
|
||||||
|
ReturnValue_t commandChildren(Mode_t mode, Submode_t submode) override;
|
||||||
|
ReturnValue_t checkChildrenStateOn(Mode_t wantedMode, Submode_t wantedSubmode) override;
|
||||||
|
ReturnValue_t isModeCombinationValid(Mode_t mode, Submode_t submode) override;
|
||||||
|
|
||||||
|
ReturnValue_t checkAndHandleHealthState(Mode_t deviceMode, Submode_t deviceSubmode);
|
||||||
#endif /* MISSION_SYSTEM_OBJECTS_IMTQASSEMBLY_H_ */
|
};
|
||||||
|
@ -93,13 +93,13 @@ void buildSafeSequence(Subsystem& ss, ModeListEntry& eh) {
|
|||||||
ctxc);
|
ctxc);
|
||||||
|
|
||||||
// Build SAFE transition 1
|
// Build SAFE transition 1
|
||||||
//check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)),
|
// check(ss.addTable(TableEntry(EIVE_TABLE_SAFE_TRANS_1.first, &EIVE_TABLE_SAFE_TRANS_1.second)),
|
||||||
// ctxc);
|
// ctxc);
|
||||||
|
|
||||||
// Build Safe sequence
|
// Build Safe sequence
|
||||||
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TGT.first, 0, false);
|
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TGT.first, 0, false);
|
||||||
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_0.first, 0, false);
|
ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_0.first, 0, false);
|
||||||
//ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false);
|
// ihs(EIVE_SEQUENCE_SAFE.second, EIVE_TABLE_SAFE_TRANS_1.first, 0, false);
|
||||||
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_SAFE.first, &EIVE_SEQUENCE_SAFE.second,
|
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_SAFE.first, &EIVE_SEQUENCE_SAFE.second,
|
||||||
EIVE_SEQUENCE_SAFE.first)),
|
EIVE_SEQUENCE_SAFE.first)),
|
||||||
ctxc);
|
ctxc);
|
||||||
@ -135,13 +135,13 @@ void buildIdleSequence(Subsystem& ss, ModeListEntry& eh) {
|
|||||||
ctxc);
|
ctxc);
|
||||||
|
|
||||||
// Build SAFE transition 1
|
// Build SAFE transition 1
|
||||||
//check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)),
|
// check(ss.addTable(TableEntry(EIVE_TABLE_IDLE_TRANS_1.first, &EIVE_TABLE_IDLE_TRANS_1.second)),
|
||||||
// ctxc);
|
// ctxc);
|
||||||
|
|
||||||
// Build Safe sequence
|
// Build Safe sequence
|
||||||
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TGT.first, 0, false);
|
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TGT.first, 0, false);
|
||||||
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_0.first, 0, false);
|
ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_0.first, 0, false);
|
||||||
//ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false);
|
// ihs(EIVE_SEQUENCE_IDLE.second, EIVE_TABLE_IDLE_TRANS_1.first, 0, false);
|
||||||
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_IDLE.first, &EIVE_SEQUENCE_IDLE.second,
|
check(ss.addSequence(SequenceEntry(EIVE_SEQUENCE_IDLE.first, &EIVE_SEQUENCE_IDLE.second,
|
||||||
EIVE_SEQUENCE_SAFE.first)),
|
EIVE_SEQUENCE_SAFE.first)),
|
||||||
ctxc);
|
ctxc);
|
||||||
|
Loading…
Reference in New Issue
Block a user