Robin Mueller
9790b395e6
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34 lines
1.5 KiB
C++
34 lines
1.5 KiB
C++
#ifndef BSP_Q7S_SPI_Q7SSPICOMIF_H_
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#define BSP_Q7S_SPI_Q7SSPICOMIF_H_
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#include <fsfw_hal/linux/spi/SpiComIF.h>
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/**
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* @brief This additional communication interface is required because the SPI busses behind the
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* devices "/dev/spi2.0" and "dev/spidev3.0" are multiplexed to one SPI interface.
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* This was necessary because the processing system spi (/dev/spi2.0) does not support
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* frequencies lower than 650 kHz. To reach lower frequencies also the CPU frequency must
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* be reduced which leads to other effects compromising kernel drivers.
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* The nano avionics reaction wheels require a spi frequency between 150 kHz and 300 kHz
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* why an additional AXI SPI core has been implemented in the programmable logic. However,
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* the spi frequency of the AXI SPI core is not configurable during runtime. Therefore,
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* this communication interface multiplexes either the hard-wired SPI or the AXI SPI to
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* the SPI interface. The multiplexing is performed via a GPIO connected to a VHDL
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* module responsible for switching between the to SPI peripherals.
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*/
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class Q7sSpiComIF: public SpiComIF {
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public:
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/**
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* @brief Constructor
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*
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* @param objectId
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* @param gpioComIF
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* @param gpioSwitchId The gpio ID of the GPIO connected to the SPI mux module in the PL.
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*/
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Q7sSpiComIF(object_id_t objectId, GpioIF* gpioComIF, gpioId_t gpioSwitchId);
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virtual ~Q7sSpiComIF();
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};
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#endif /* BSP_Q7S_SPI_Q7SSPICOMIF_H_ */
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