eive-obsw/linux/fsfwconfig/devices/gpioIds.h
Robin Mueller 3354f2a696
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2021-09-13 18:07:07 +02:00

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C++

#ifndef FSFWCONFIG_DEVICES_GPIOIDS_H_
#define FSFWCONFIG_DEVICES_GPIOIDS_H_
#include <fsfw_hal/common/gpio/GpioIF.h>
namespace gpioIds {
enum gpioId_t {
HEATER_0,
HEATER_1,
HEATER_2,
HEATER_3,
HEATER_4,
HEATER_5,
HEATER_6,
HEATER_7,
DEPLSA1,
DEPLSA2,
MGM_0_LIS3_CS,
MGM_1_RM3100_CS,
GYRO_0_ADIS_CS,
GYRO_1_L3G_CS,
GYRO_2_ADIS_CS,
GYRO_3_L3G_CS,
MGM_2_LIS3_CS,
MGM_3_RM3100_CS,
GNSS_0_NRESET,
GNSS_1_NRESET,
GYRO_0_ENABLE,
GYRO_2_ENABLE,
TEST_ID_0,
TEST_ID_1,
RTD_IC3,
RTD_IC4,
RTD_IC5,
RTD_IC6,
RTD_IC7,
RTD_IC8,
RTD_IC9,
RTD_IC10,
RTD_IC11,
RTD_IC12,
RTD_IC13,
RTD_IC14,
RTD_IC15,
RTD_IC16,
RTD_IC17,
RTD_IC18,
CS_SUS_1,
CS_SUS_2,
CS_SUS_3,
CS_SUS_4,
CS_SUS_5,
CS_SUS_6,
CS_SUS_7,
CS_SUS_8,
CS_SUS_9,
CS_SUS_10,
CS_SUS_11,
CS_SUS_12,
CS_SUS_13,
SPI_MUX_BIT_1,
SPI_MUX_BIT_2,
SPI_MUX_BIT_3,
SPI_MUX_BIT_4,
SPI_MUX_BIT_5,
SPI_MUX_BIT_6,
CS_RAD_SENSOR,
PAPB_BUSY_N,
PAPB_EMPTY,
EN_RW1,
EN_RW2,
EN_RW3,
EN_RW4,
CS_RW1,
CS_RW2,
CS_RW3,
CS_RW4,
EN_RW_CS,
SPI_MUX
};
}
#endif /* FSFWCONFIG_DEVICES_GPIOIDS_H_ */