eive-obsw/bsp_q7s/gpio/gpioCallbacks.cpp
2021-09-20 17:47:29 +02:00

340 lines
10 KiB
C++

#include "gpioCallbacks.h"
#include "busConf.h"
#include <devices/gpioIds.h>
#include <fsfw_hal/linux/gpio/LinuxLibgpioIF.h>
#include <fsfw_hal/common/gpio/GpioCookie.h>
#include <fsfw/serviceinterface/ServiceInterface.h>
namespace gpioCallbacks {
GpioIF* gpioComInterface;
void initSpiCsDecoder(GpioIF* gpioComIF) {
ReturnValue_t result;
if (gpioComIF == nullptr) {
sif::debug << "initSpiCsDecoder: Invalid gpioComIF" << std::endl;
return;
}
gpioComInterface = gpioComIF;
GpioCookie* spiMuxGpios = new GpioCookie;
/** Setting mux bit 1 to low will disable IC21 on the interface board */
GpiodRegular* spiMuxBit1 = new GpiodRegular(std::string("SPI Mux Bit 1"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_1);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit1);
/** Setting mux bit 2 to low disables IC1 on the TCS board */
GpiodRegular* spiMuxBit2 = new GpiodRegular(std::string("SPI Mux Bit 2"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_2);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit2);
/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
GpiodRegular* spiMuxBit3 = new GpiodRegular(std::string("SPI Mux Bit 3"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_3);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit3);
/** The following gpios can take arbitrary initial values */
GpiodRegular* spiMuxBit4 = new GpiodRegular(std::string("SPI Mux Bit 4"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_4);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit4);
GpiodRegular* spiMuxBit5 = new GpiodRegular(std::string("SPI Mux Bit 5"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_5);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit5);
GpiodRegular* spiMuxBit6 = new GpiodRegular(std::string("SPI Mux Bit 6"), gpio::OUT, 0,
q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_6);
spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_6, spiMuxBit6);
GpiodRegular* enRwDecoder = new GpiodRegular(std::string("EN_RW_CS"), gpio::OUT, 1,
q7s::GPIO_FLEX_OBC1F_B1, q7s::EN_RW_CS);
spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
result = gpioComInterface->addGpios(spiMuxGpios);
if (result != HasReturnvaluesIF::RETURN_OK) {
sif::error << "initSpiCsDecoder: Failed to add mux bit gpios to gpioComIF" << std::endl;
return;
}
}
void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, int value,
void* args) {
if (gpioComInterface == nullptr) {
sif::debug << "spiCsDecoderCallback: No gpioComIF specified. Call initSpiCsDecoder "
<< "to specify gpioComIF" << std::endl;
return;
}
/* Reading is not supported by the callback function */
if (gpioOp == gpio::GpioOperation::READ) {
return;
}
if (value == 1) {
disableAllDecoder();
}
else if (value == 0) {
switch (gpioId) {
case(gpioIds::RTD_IC3): {
enableDecoderTcsIc1();
selectY7();
break;
}
case(gpioIds::RTD_IC4): {
enableDecoderTcsIc1();
selectY6();
break;
}
case(gpioIds::RTD_IC5): {
enableDecoderTcsIc1();
selectY5();
break;
}
case(gpioIds::RTD_IC6): {
enableDecoderTcsIc1();
selectY4();
break;
}
case(gpioIds::RTD_IC7): {
enableDecoderTcsIc1();
selectY3();
break;
}
case(gpioIds::RTD_IC8): {
enableDecoderTcsIc1();
selectY2();
break;
}
case(gpioIds::RTD_IC9): {
enableDecoderTcsIc1();
selectY1();
break;
}
case(gpioIds::RTD_IC10): {
enableDecoderTcsIc1();
selectY0();
break;
}
case(gpioIds::RTD_IC11): {
enableDecoderTcsIc2();
selectY7();
break;
}
case(gpioIds::RTD_IC12): {
enableDecoderTcsIc2();
selectY6();
break;
}
case(gpioIds::RTD_IC13): {
enableDecoderTcsIc2();
selectY5();
break;
}
case(gpioIds::RTD_IC14): {
enableDecoderTcsIc2();
selectY4();
break;
}
case(gpioIds::RTD_IC15): {
enableDecoderTcsIc2();
selectY3();
break;
}
case(gpioIds::RTD_IC16): {
enableDecoderTcsIc2();
selectY2();
break;
}
case(gpioIds::RTD_IC17): {
enableDecoderTcsIc2();
selectY1();
break;
}
case(gpioIds::RTD_IC18): {
enableDecoderTcsIc2();
selectY0();
break;
}
case(gpioIds::CS_SUS_1): {
enableDecoderInterfaceBoardIc1();
selectY0();
break;
}
case(gpioIds::CS_SUS_2): {
enableDecoderInterfaceBoardIc1();
selectY1();
break;
}
case(gpioIds::CS_SUS_3): {
enableDecoderInterfaceBoardIc2();
selectY0();
break;
}
case(gpioIds::CS_SUS_4): {
enableDecoderInterfaceBoardIc2();
selectY1();
break;
}
case(gpioIds::CS_SUS_5): {
enableDecoderInterfaceBoardIc2();
selectY2();
break;
}
case(gpioIds::CS_SUS_6): {
enableDecoderInterfaceBoardIc1();
selectY2();
break;
}
case(gpioIds::CS_SUS_7): {
enableDecoderInterfaceBoardIc1();
selectY3();
break;
}
case(gpioIds::CS_SUS_8): {
enableDecoderInterfaceBoardIc2();
selectY3();
break;
}
case(gpioIds::CS_SUS_9): {
enableDecoderInterfaceBoardIc1();
selectY4();
break;
}
case(gpioIds::CS_SUS_10): {
enableDecoderInterfaceBoardIc1();
selectY5();
break;
}
case(gpioIds::CS_SUS_11): {
enableDecoderInterfaceBoardIc2();
selectY4();
break;
}
case(gpioIds::CS_SUS_12): {
enableDecoderInterfaceBoardIc2();
selectY5();
break;
}
case(gpioIds::CS_SUS_13): {
enableDecoderInterfaceBoardIc1();
selectY6();
break;
}
case(gpioIds::CS_RW1): {
enableRwDecoder();
selectY0();
break;
}
case(gpioIds::CS_RW2): {
enableRwDecoder();
selectY1();
break;
}
case(gpioIds::CS_RW3): {
enableRwDecoder();
selectY2();
break;
}
case(gpioIds::CS_RW4): {
enableRwDecoder();
selectY3();
break;
}
default:
sif::debug << "spiCsDecoderCallback: Invalid gpio id " << gpioId << std::endl;
}
}
else {
sif::debug << "spiCsDecoderCallback: Invalid value. Must be 0 or 1" << std::endl;
}
}
void enableDecoderTcsIc1() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
}
void enableDecoderTcsIc2() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
}
void enableDecoderInterfaceBoardIc1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
}
void enableDecoderInterfaceBoardIc2() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
}
void enableRwDecoder() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullHigh(gpioIds::EN_RW_CS);
}
void selectY0() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY1() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY2() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY3() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
}
void selectY4() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void selectY5() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void selectY6() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void selectY7() {
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
}
void disableAllDecoder() {
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
gpioComInterface->pullLow(gpioIds::EN_RW_CS);
}
}