103 lines
3.5 KiB
C++
103 lines
3.5 KiB
C++
#ifndef LINUX_OBC_AXIPTMECONFIG_H_
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#define LINUX_OBC_AXIPTMECONFIG_H_
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#include <string>
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#include "fsfw/ipc/MutexIF.h"
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#include "fsfw/objectmanager/SystemObject.h"
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#include "fsfw/returnvalues/returnvalue.h"
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/**
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* @brief Class providing low level access to the configuration interface of the PTME.
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*
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* @author J. Meier
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*/
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class AxiPtmeConfig : public SystemObject {
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public:
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/**
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* @brief Constructor
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* @param axiUio Device file of UIO belonging to the AXI configuration interface.
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* @param mapNum Number of map belonging to axi configuration interface.
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*/
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AxiPtmeConfig(object_id_t objectId, std::string axiUio, int mapNum);
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virtual ~AxiPtmeConfig();
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virtual ReturnValue_t initialize() override;
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/**
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* @brief Will write to the bitrate configuration register. Actual generated rate depends on
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* frequency of the clock connected to the bit clock input of PTME.
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*/
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ReturnValue_t writeCaduRateReg(uint8_t rateVal);
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/**
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* @brief Next to functions control the tx clock manipulator component
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*
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* @details If the tx clock manipulator is enabled the output clock of the PTME is manipulated
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* in a way that both high and low periods in the clock signal have equal lengths.
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* The default implementation of the PTME generates a clock where the high level is
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* only one bit clock period long. This might be too short to match the setup and hold
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* times of the S-and transceiver.
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* Default: Enables TX clock manipulator
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*
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*/
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ReturnValue_t enableTxclockManipulator();
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ReturnValue_t disableTxclockManipulator();
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/**
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* @brief The next to functions control whether data will be updated on the rising or falling edge
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* of the tx clock.
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* Enable inversion will update data on falling edge (not the configuration required by the
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* syrlinks)
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* Disable clock inversion. Data updated on rising edge.
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* Default: Inversion is disabled
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*/
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ReturnValue_t enableTxclockInversion();
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ReturnValue_t disableTxclockInversion();
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private:
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// Address of register storing the bitrate configuration parameter
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static const uint32_t CADU_BITRATE_REG = 0x0;
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// Address of register storing common configuration parameters
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static const uint32_t COMMON_CONFIG_REG = 0x4;
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static const uint32_t ADRESS_DIVIDER = 4;
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enum class BitPos : uint32_t { EN_TX_CLK_MANIPULATOR, INVERT_CLOCK };
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std::string axiUio;
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std::string uioMap;
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int mapNum = 0;
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MutexIF* mutex = nullptr;
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MutexIF::TimeoutType timeoutType = MutexIF::TimeoutType::WAITING;
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uint32_t mutexTimeout = 20;
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uint32_t* baseAddress = nullptr;
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/**
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* @brief Function to write to configuration registers
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*
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* @param writeVal Value to write
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*/
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ReturnValue_t writeReg(uint32_t regOffset, uint32_t writeVal);
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/**
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* @brief Reads value from configuration register
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*
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* @param regOffset Offset of register from base address to read from
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* Qparam readVal Pointer to variable where read value will be written to
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*/
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ReturnValue_t readReg(uint32_t regOffset, uint32_t* readVal);
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/**
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* @brief Sets one bit in a register
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*
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* @param regOffset Offset of the register where to set the bit
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* @param bitVal The value of the bit to set (1 or 0)
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* @param bitPos The position of the bit within the register to set
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*
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* @return returnvalue::OK if successful, otherwise returnvalue::FAILED
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*/
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ReturnValue_t writeBit(uint32_t regOffset, bool bitVal, BitPos bitPos);
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};
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#endif /* LINUX_OBC_AXIPTMECONFIG_H_ */
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