Robin Mueller
c784d1251b
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EIVE/eive-obsw/pipeline/pr-main This commit looks good
356 lines
11 KiB
C++
356 lines
11 KiB
C++
#ifndef LINUX_OBC_PDECHANDLER_H_
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#define LINUX_OBC_PDECHANDLER_H_
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#include <fsfw/timemanager/Countdown.h>
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#include <atomic>
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#include "OBSWConfig.h"
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#include "PdecConfig.h"
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#include "eive/definitions.h"
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#include "fsfw/action/ActionHelper.h"
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#include "fsfw/action/HasActionsIF.h"
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#include "fsfw/objectmanager/SystemObject.h"
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#include "fsfw/parameters/ParameterHelper.h"
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#include "fsfw/parameters/ReceivesParameterMessagesIF.h"
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#include "fsfw/returnvalues/returnvalue.h"
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#include "fsfw/storagemanager/StorageManagerIF.h"
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#include "fsfw/tasks/ExecutableObjectIF.h"
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#include "fsfw/tmtcservices/AcceptsTelecommandsIF.h"
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#include "fsfw_hal/common/gpio/gpioDefinitions.h"
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#include "fsfw_hal/linux/gpio/LinuxLibgpioIF.h"
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struct UioNames {
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const char* configMemory;
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const char* ramMemory;
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const char* registers;
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const char* irq;
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};
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/**
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* @brief This class controls the PDEC IP Core implemented in the programmable logic of the
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* Zynq-7020. All registers and memories of the PDEC IP Core are accessed via UIO
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* drivers.
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*
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* @details The PDEC IP Core is responsible for processing data received in form of CLTUs from the
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* S-Band transceiver. This comprises the BCH decoding of the CLTUs and reconstruction of
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* telecommand transfer frames. Finally the PDEC stores the TC segment transported with
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* the TC transfer frame in a register. As soon as a new TC has been received a new
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* frame acceptance report (FAR) will be generated. If the FAR confirms the validity of
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* a received TC segment, the data can be read out from the associated register.
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* Currently, the ground software only supports transmissions of CLTUs containing one
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* space packet.
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* Link to datasheet of PDEC IP Core: https://eive-cloud.irs.uni-stuttgart.de/index.php/
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* apps/files/?dir=/EIVE_IRS/Arbeitsdaten/08_Used%20Components/CCSDS_IP_Cores&fileid=1108967
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*
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* @author J. Meier
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*/
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class PdecHandler : public SystemObject,
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public ExecutableObjectIF,
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public HasActionsIF,
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public ReceivesParameterMessagesIF {
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public:
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static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500;
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static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000;
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static constexpr uint32_t PDEC_RAM_SIZE = 0x10000;
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enum class Modes { POLLED, IRQ };
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/**
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* @brief Constructor
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* @param objectId Object ID of PDEC handler system object
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* @param tcDestinationId Object ID of object responsible for processing TCs.
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* @param gpioComIF Pointer to GPIO interace responsible for driving GPIOs.
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* @param pdecReset GPIO ID of GPIO connected to the reset signal of the PDEC.
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* @param uioConfigMemory String of uio device file same mapped to the PDEC memory space
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* @param uioregsiters String of uio device file same mapped to the PDEC register space
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*/
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PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
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gpioId_t pdecReset, UioNames names, uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr);
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virtual ~PdecHandler();
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ReturnValue_t performOperation(uint8_t operationCode = 0);
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ReturnValue_t initialize() override;
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MessageQueueId_t getCommandQueue() const;
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ReturnValue_t executeAction(ActionId_t actionId, MessageQueueId_t commandedBy,
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const uint8_t* data, size_t size) override;
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ReturnValue_t getParameter(uint8_t domainId, uint8_t uniqueIdentifier,
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ParameterWrapper* parameterWrapper, const ParameterWrapper* newValues,
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uint16_t startAtIndex) override;
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private:
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static constexpr Modes OP_MODE = Modes::IRQ;
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static const uint32_t QUEUE_SIZE = config::CCSDS_HANDLER_QUEUE_SIZE;
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#ifdef TE0720_1CFA
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static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
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static const int RAM_MAP_SIZE = 0x4000;
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static const int REGISTER_MAP_SIZE = 0x10000;
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#else
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static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
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static const int RAM_MAP_SIZE = 0x4000;
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static const int REGISTER_MAP_SIZE = 0x4000;
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#endif /* BOARD_TE0720 == 1 */
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static const size_t MAX_TC_SEGMENT_SIZE = 1017;
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static const uint8_t MAP_ID_MASK = 0x3F;
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// Expected value stored in FAR register after reset
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static const uint32_t FAR_RESET = 0x7FE0;
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static const uint32_t TC_SEGMENT_LEN = 1017;
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static const uint32_t NO_RF_MASK = 0x8000;
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static const uint32_t NO_BITLOCK_MASK = 0x4000;
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static const uint32_t MAX_INIT_TRIES = 20;
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class ParameterId {
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public:
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// ID of the parameter to update the positive window of AD frames
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static const uint8_t POSITIVE_WINDOW = 0;
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// ID of the parameter to update the negative window of AD frames
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static const uint8_t NEGATIVE_WINDOW = 1;
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};
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static constexpr uint32_t MAX_ALLOWED_IRQS_PER_WINDOW = 800;
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enum class IReason_t : uint8_t {
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NO_REPORT,
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ERROR_VERSION_NUMBER,
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ILLEGAL_COMBINATION,
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INVALID_SC_ID,
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INVALID_VC_ID_LSB,
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INVALID_VC_ID_MSB,
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NS_NOT_ZERO,
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INCORRECT_BC_CC
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};
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enum class State : uint8_t { INIT, PDEC_RESET, RUNNING, WAIT_FOR_RECOVERY };
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static uint32_t CURRENT_FAR;
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Countdown genericCheckCd = Countdown(IRQ_TIMEOUT_MS);
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object_id_t tcDestinationId;
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int irqFd = 0;
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AcceptsTelecommandsIF* tcDestination = nullptr;
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LinuxLibgpioIF* gpioComIF = nullptr;
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uint32_t interruptCounter = 0;
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Countdown interruptWindowCd = Countdown(1000);
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/**
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* Reset signal is required to hold PDEC in reset state until the configuration has been
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* written to the appropriate memory space.
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* Can also be used to reboot PDEC in case of erros.
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*/
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gpioId_t pdecReset = gpio::NO_GPIO;
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uint32_t tcAbortCounter = 0;
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ActionHelper actionHelper;
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StorageManagerIF* tcStore = nullptr;
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MessageQueueIF* commandQueue = nullptr;
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State state = State::INIT;
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/**
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* Pointer pointing to base address of the PDEC memory space.
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* This address is equivalent with the base address of the section named configuration area in
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* the PDEC datasheet.
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*/
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uint32_t* memoryBaseAddress = nullptr;
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uint32_t* ramBaseAddress = nullptr;
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// Pointer pointing to base address of register space
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uint32_t* registerBaseAddress = nullptr;
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uint8_t tcSegment[TC_SEGMENT_LEN];
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// Used to check carrier and bit lock changes (default set to no rf and no bitlock)
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uint32_t lastClcw = 0xC000;
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bool carrierLock = false;
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bool bitLock = false;
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MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE;
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bool ptmeResetWithReinitializationPending = false;
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uint32_t cfgMemBaseAddr;
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uint32_t pdecRamBaseAddr;
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UioNames uioNames;
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ParameterHelper paramHelper;
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PdecConfig pdecConfig;
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uint32_t initTries = 0;
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// scuffed test counter.
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uint8_t testCntr = 0;
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/**
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* @brief Performs initialization stuff which must be performed in first
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* loop of running task
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*
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* @return OK if successful, otherwise FAILED
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*/
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ReturnValue_t firstLoop();
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/**
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* @brief Reads and handles messages stored in the commandQueue
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*/
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void readCommandQueue(void);
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ReturnValue_t polledOperation();
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ReturnValue_t irqOperation();
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ReturnValue_t handleInitState();
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void openIrqFile();
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ReturnValue_t checkAndHandleIrqs(uint32_t& info);
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uint32_t readFar();
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/**
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* @brief This functions writes the configuration parameters to the configuration
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* section of the PDEC.
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*/
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void writePdecConfigDuringReset(PdecConfig& config);
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/**
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* @brief Reading the FAR resets the set stat flag which signals a new TC. Without clearing
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* this flag no new TC will be excepted. After start up the flag is set and needs
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* to be reset.
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* Stat flag 0 - new TC received
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* Stat flag 1 - old TC (ready to receive next TC)
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*/
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ReturnValue_t resetFarStatFlag();
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/**
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* @brief Releases the PDEC from reset state. PDEC will start with loading the written
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* configuration parameters.
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*/
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ReturnValue_t releasePdec();
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/**
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* @brief Will set PDEC in reset state. Use releasePdec() to release PDEC
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* from reset state
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*
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* @return OK if successful, otherwise error return value
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*/
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ReturnValue_t pdecToReset();
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/**
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* @brief Reads the FAR register and checks if a new TC has been received.
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*/
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bool newTcReceived();
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/**
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* @brief Checks if carrier lock or bit lock has been detected and triggers appropriate
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* event.
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*/
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void doPeriodicWork();
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void checkLocks();
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void resetIrqLimiters();
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/**
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* @brief Analyzes the FramAna field (frame analysis data) of a FAR report.
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*
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* @return True if frame valid, otherwise false.
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*/
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bool checkFrameAna(uint32_t pdecFar);
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/**
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* @brief This function handles the IReason field of the frame analysis report.
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*
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* @details In case frame as been declared illegal for multiple reasons, the reason with the
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* lowest value will be shown.
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*/
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void handleIReason(uint32_t pdecFar, ReturnValue_t parameter1);
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/**
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* @brief Checks if PDEC configuration is still correct
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*/
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void checkConfig();
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/**
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* @brief Handles the reception of new TCs. Reads the pointer to the storage location of the
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* new TC segment, extracts the PUS packet and forwards the data to the object
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* responsible for processing the TC.
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*/
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void handleNewTc();
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/**
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* @brief Function reads the last received TC segment from the PDEC memory and copies
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* the data to the tcSegement array.
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*
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* @param tcLength The length of the received TC.
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*
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*/
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ReturnValue_t readTc(uint32_t& tcLength);
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/**
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* @brief Prints the tc segment data
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*/
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void printTC(uint32_t tcLength);
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/**
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* @brief This function calculates the entry for the configuration of the MAP ID routing.
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*
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* @param mapAddr The MAP ID to configure
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* @param moduleId The destination module where all TCs with the map id mapAddr will be routed
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* to.
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*
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* @details The PDEC has different modules where the TCs can be routed to. A lookup table is
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* used which links the MAP ID field to the destination module. The entry for this
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* lookup table is created by this function and must be stored in the configuration
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* memory region of the PDEC. The entry has a specific format
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*/
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uint8_t calcMapAddrEntry(uint8_t moduleId);
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/**
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* brief Returns the 32-bit wide communication link control word (CLCW)
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*/
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uint32_t getClcw();
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/**
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* @brief Returns the PDEC monitor register content
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*
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*/
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uint32_t getPdecMon();
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/**
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* @brief Reads and prints the CLCW. Can be useful for debugging.
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*/
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void printClcw();
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/**
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* @brief Prints monitor register information to debug console.
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*/
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void printPdecMon();
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void pdecResetNoInit();
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ReturnValue_t postResetOperation();
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void initializeReset();
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void initFailedHandler(ReturnValue_t reason);
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std::string getMonStatusString(uint32_t status);
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};
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#endif /* LINUX_OBC_PDECHANDLER_H_ */
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