Robin Mueller
652cfa0986
All checks were successful
EIVE/eive-obsw/pipeline/head This commit looks good
341 lines
10 KiB
C++
341 lines
10 KiB
C++
#include "gpioCallbacks.h"
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#include "busConf.h"
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#include <devices/gpioIds.h>
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#include <fsfw_hal/linux/gpio/LinuxLibgpioIF.h>
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#include <fsfw_hal/common/gpio/GpioCookie.h>
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#include <fsfw/serviceinterface/ServiceInterface.h>
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namespace gpioCallbacks {
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GpioIF* gpioComInterface;
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void initSpiCsDecoder(GpioIF* gpioComIF) {
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ReturnValue_t result;
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if (gpioComIF == nullptr) {
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sif::debug << "initSpiCsDecoder: Invalid gpioComIF" << std::endl;
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return;
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}
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gpioComInterface = gpioComIF;
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GpioCookie* spiMuxGpios = new GpioCookie;
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GpiodRegularByLabel* spiMuxBit = nullptr;
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/** Setting mux bit 1 to low will disable IC21 on the interface board */
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_1,
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"SPI Mux Bit 1", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_1, spiMuxBit);
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/** Setting mux bit 2 to low disables IC1 on the TCS board */
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_2,
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"SPI Mux Bit 2", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_2, spiMuxBit);
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/** Setting mux bit 3 to low disables IC2 on the TCS board and IC22 on the interface board */
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_3,
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"SPI Mux Bit 3", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_3, spiMuxBit);
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/** The following gpios can take arbitrary initial values */
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_4,
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"SPI Mux Bit 4", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_4, spiMuxBit);
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_5,
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"SPI Mux Bit 5", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_5, spiMuxBit);
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spiMuxBit = new GpiodRegularByLabel(q7s::GPIO_3V3_OBC1C, q7s::SPI_MUX_BIT_6,
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"SPI Mux Bit 6", gpio::OUT, gpio::LOW);
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spiMuxGpios->addGpio(gpioIds::SPI_MUX_BIT_6, spiMuxBit);
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GpiodRegularByLabel* enRwDecoder = new GpiodRegularByLabel(q7s::GPIO_FLEX_OBC1F_B1,
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q7s::EN_RW_CS, "EN_RW_CS", gpio::OUT, gpio::HIGH);
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spiMuxGpios->addGpio(gpioIds::EN_RW_CS, enRwDecoder);
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result = gpioComInterface->addGpios(spiMuxGpios);
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if (result != HasReturnvaluesIF::RETURN_OK) {
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sif::error << "initSpiCsDecoder: Failed to add mux bit gpios to gpioComIF" << std::endl;
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return;
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}
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}
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void spiCsDecoderCallback(gpioId_t gpioId, gpio::GpioOperation gpioOp, int value,
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void* args) {
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if (gpioComInterface == nullptr) {
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sif::debug << "spiCsDecoderCallback: No gpioComIF specified. Call initSpiCsDecoder "
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<< "to specify gpioComIF" << std::endl;
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return;
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}
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/* Reading is not supported by the callback function */
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if (gpioOp == gpio::GpioOperation::READ) {
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return;
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}
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if (value == 1) {
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disableAllDecoder();
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}
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else if (value == 0) {
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switch (gpioId) {
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case(gpioIds::RTD_IC3): {
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enableDecoderTcsIc1();
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selectY7();
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break;
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}
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case(gpioIds::RTD_IC4): {
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enableDecoderTcsIc1();
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selectY6();
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break;
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}
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case(gpioIds::RTD_IC5): {
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enableDecoderTcsIc1();
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selectY5();
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break;
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}
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case(gpioIds::RTD_IC6): {
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enableDecoderTcsIc1();
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selectY4();
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break;
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}
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case(gpioIds::RTD_IC7): {
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enableDecoderTcsIc1();
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selectY3();
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break;
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}
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case(gpioIds::RTD_IC8): {
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enableDecoderTcsIc1();
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selectY2();
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break;
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}
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case(gpioIds::RTD_IC9): {
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enableDecoderTcsIc1();
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selectY1();
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break;
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}
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case(gpioIds::RTD_IC10): {
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enableDecoderTcsIc1();
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selectY0();
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break;
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}
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case(gpioIds::RTD_IC11): {
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enableDecoderTcsIc2();
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selectY7();
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break;
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}
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case(gpioIds::RTD_IC12): {
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enableDecoderTcsIc2();
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selectY6();
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break;
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}
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case(gpioIds::RTD_IC13): {
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enableDecoderTcsIc2();
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selectY5();
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break;
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}
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case(gpioIds::RTD_IC14): {
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enableDecoderTcsIc2();
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selectY4();
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break;
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}
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case(gpioIds::RTD_IC15): {
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enableDecoderTcsIc2();
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selectY3();
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break;
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}
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case(gpioIds::RTD_IC16): {
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enableDecoderTcsIc2();
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selectY2();
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break;
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}
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case(gpioIds::RTD_IC17): {
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enableDecoderTcsIc2();
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selectY1();
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break;
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}
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case(gpioIds::RTD_IC18): {
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enableDecoderTcsIc2();
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selectY0();
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break;
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}
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case(gpioIds::CS_SUS_1): {
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enableDecoderInterfaceBoardIc1();
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selectY0();
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break;
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}
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case(gpioIds::CS_SUS_2): {
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enableDecoderInterfaceBoardIc1();
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selectY1();
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break;
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}
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case(gpioIds::CS_SUS_3): {
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enableDecoderInterfaceBoardIc2();
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selectY0();
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break;
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}
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case(gpioIds::CS_SUS_4): {
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enableDecoderInterfaceBoardIc2();
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selectY1();
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break;
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}
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case(gpioIds::CS_SUS_5): {
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enableDecoderInterfaceBoardIc2();
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selectY2();
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break;
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}
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case(gpioIds::CS_SUS_6): {
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enableDecoderInterfaceBoardIc1();
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selectY2();
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break;
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}
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case(gpioIds::CS_SUS_7): {
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enableDecoderInterfaceBoardIc1();
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selectY3();
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break;
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}
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case(gpioIds::CS_SUS_8): {
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enableDecoderInterfaceBoardIc2();
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selectY3();
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break;
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}
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case(gpioIds::CS_SUS_9): {
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enableDecoderInterfaceBoardIc1();
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selectY4();
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break;
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}
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case(gpioIds::CS_SUS_10): {
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enableDecoderInterfaceBoardIc1();
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selectY5();
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break;
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}
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case(gpioIds::CS_SUS_11): {
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enableDecoderInterfaceBoardIc2();
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selectY4();
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break;
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}
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case(gpioIds::CS_SUS_12): {
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enableDecoderInterfaceBoardIc2();
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selectY5();
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break;
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}
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case(gpioIds::CS_SUS_13): {
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enableDecoderInterfaceBoardIc1();
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selectY6();
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break;
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}
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case(gpioIds::CS_RW1): {
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enableRwDecoder();
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selectY0();
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break;
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}
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case(gpioIds::CS_RW2): {
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enableRwDecoder();
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selectY1();
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break;
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}
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case(gpioIds::CS_RW3): {
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enableRwDecoder();
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selectY2();
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break;
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}
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case(gpioIds::CS_RW4): {
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enableRwDecoder();
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selectY3();
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break;
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}
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default:
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sif::debug << "spiCsDecoderCallback: Invalid gpio id " << gpioId << std::endl;
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}
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}
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else {
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sif::debug << "spiCsDecoderCallback: Invalid value. Must be 0 or 1" << std::endl;
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}
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}
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void enableDecoderTcsIc1() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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void enableDecoderTcsIc2() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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}
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void enableDecoderInterfaceBoardIc1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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}
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void enableDecoderInterfaceBoardIc2() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_3);
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}
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void enableRwDecoder() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullHigh(gpioIds::EN_RW_CS);
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}
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void selectY0() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY1() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY2() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY3() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY4() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY5() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY6() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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}
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void selectY7() {
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_4);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_5);
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gpioComInterface->pullHigh(gpioIds::SPI_MUX_BIT_6);
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}
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void disableAllDecoder() {
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_1);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_2);
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gpioComInterface->pullLow(gpioIds::SPI_MUX_BIT_3);
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gpioComInterface->pullLow(gpioIds::EN_RW_CS);
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}
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}
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