416 lines
15 KiB
C++
416 lines
15 KiB
C++
#ifndef LINUX_OBC_PDECHANDLER_H_
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#define LINUX_OBC_PDECHANDLER_H_
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#include "OBSWConfig.h"
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#include "PdecConfig.h"
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#include "fsfw/action/ActionHelper.h"
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#include "fsfw/action/HasActionsIF.h"
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#include "fsfw/objectmanager/SystemObject.h"
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#include "fsfw/returnvalues/HasReturnvaluesIF.h"
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#include "fsfw/storagemanager/StorageManagerIF.h"
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#include "fsfw/tasks/ExecutableObjectIF.h"
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#include "fsfw/tmtcservices/AcceptsTelecommandsIF.h"
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#include "fsfw_hal/common/gpio/gpioDefinitions.h"
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#include "fsfw_hal/linux/gpio/LinuxLibgpioIF.h"
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/**
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* @brief This class controls the PDEC IP Core implemented in the programmable logic of the
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* Zynq-7020. All registers and memories of the PDEC IP Core are accessed via UIO
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* drivers.
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*
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* @details The PDEC IP Core is responsible for processing data received in form of CLTUs from the
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* S-Band transceiver. This comprises the BCH decoding of the CLTUs and reconstruction of
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* telecommand transfer frames. Finally the PDEC stores the TC segment transported with
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* the TC transfer frame in a register. As soon as a new TC has been received a new
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* frame acceptance report (FAR) will be generated. If the FAR confirms the validity of
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* a received TC segment, the data can be read out from the associated register.
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* Currently, the ground software only supports transmissions of CLTUs containing one
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* space packet.
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* Link to datasheet of PDEC IP Core: https://eive-cloud.irs.uni-stuttgart.de/index.php/
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* apps/files/?dir=/EIVE_IRS/Arbeitsdaten/08_Used%20Components/CCSDS_IP_Cores&fileid=1108967
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*
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* @author J. Meier
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*/
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class PdecHandler : public SystemObject,
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public ExecutableObjectIF,
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public HasReturnvaluesIF,
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public HasActionsIF {
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public:
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/**
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* @brief Constructor
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* @param objectId Object ID of PDEC handler system object
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* @param tcDestinationId Object ID of object responsible for processing TCs.
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* @param gpioComIF Pointer to GPIO interace responsible for driving GPIOs.
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* @param pdecReset GPIO ID of GPIO connected to the reset signal of the PDEC.
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* @param uioConfigMemory String of uio device file same mapped to the PDEC memory space
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* @param uioregsiters String of uio device file same mapped to the PDEC register space
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*/
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PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF,
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gpioId_t pdecReset, std::string uioConfigMemory, std::string uioRamMemory,
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std::string uioRegisters);
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virtual ~PdecHandler();
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ReturnValue_t performOperation(uint8_t operationCode = 0);
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ReturnValue_t initialize() override;
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MessageQueueId_t getCommandQueue() const;
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ReturnValue_t executeAction(ActionId_t actionId, MessageQueueId_t commandedBy,
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const uint8_t* data, size_t size) override;
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static const uint8_t SUBSYSTEM_ID = SUBSYSTEM_ID::PDEC_HANDLER;
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//! [EXPORT] : [COMMENT] Frame acceptance report signals an invalid frame
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//! P1: The frame analysis information (FrameAna field of PDEC_FAR register)
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//! P2: When frame declared illegal this parameter this parameter gives information about the
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//! reason (IReason field of the PDEC_FAR register)
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static const Event INVALID_TC_FRAME = MAKE_EVENT(1, severity::HIGH);
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//! [EXPORT] : [COMMENT] Read invalid FAR from PDEC after startup
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static const Event INVALID_FAR = MAKE_EVENT(2, severity::HIGH);
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//! [EXPORT] : [COMMENT] Carrier lock detected
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static const Event CARRIER_LOCK = MAKE_EVENT(3, severity::INFO);
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//! [EXPORT] : [COMMENT] Bit lock detected (data valid)
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static const Event BIT_LOCK_PDEC = MAKE_EVENT(4, severity::INFO);
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private:
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static const uint8_t INTERFACE_ID = CLASS_ID::PDEC_HANDLER;
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static const ReturnValue_t ABANDONED_CLTU = MAKE_RETURN_CODE(0xA0);
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static const ReturnValue_t FRAME_DIRTY = MAKE_RETURN_CODE(0xA1);
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static const ReturnValue_t FRAME_ILLEGAL_ONE_REASON = MAKE_RETURN_CODE(0xA2);
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static const ReturnValue_t FRAME_ILLEGAL_MULTIPLE_REASONS = MAKE_RETURN_CODE(0xA2);
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static const ReturnValue_t AD_DISCARDED_LOCKOUT = MAKE_RETURN_CODE(0xA3);
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static const ReturnValue_t AD_DISCARDED_WAIT = MAKE_RETURN_CODE(0xA4);
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static const ReturnValue_t AD_DISCARDED_NS_VS = MAKE_RETURN_CODE(0xA5);
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//! [EXPORT] : [COMMENT] Received action message with unknown action id
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static const ReturnValue_t COMMAND_NOT_IMPLEMENTED = MAKE_RETURN_CODE(0xB0);
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static const ReturnValue_t NO_REPORT = MAKE_RETURN_CODE(0xA6);
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//! Error in version number and reserved A and B fields
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static const ReturnValue_t ERROR_VERSION_NUMBER = MAKE_RETURN_CODE(0xA7);
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//! Illegal combination of bypass and control command flag
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static const ReturnValue_t ILLEGAL_COMBINATION = MAKE_RETURN_CODE(0xA8);
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//! Spacecraft identifier did not match
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static const ReturnValue_t INVALID_SC_ID = MAKE_RETURN_CODE(0xA9);
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//! VC identifier bits 0 to 4 did not match
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static const ReturnValue_t INVALID_VC_ID_MSB = MAKE_RETURN_CODE(0xAA);
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//! VC identifier bit 5 did not match
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static const ReturnValue_t INVALID_VC_ID_LSB = MAKE_RETURN_CODE(0xAB);
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//! N(S) of BC or BD frame not set to all zeros
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static const ReturnValue_t NS_NOT_ZERO = MAKE_RETURN_CODE(0xAC);
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//! Invalid BC control command
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static const ReturnValue_t INVALID_BC_CC = MAKE_RETURN_CODE(0xAE);
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static const uint32_t QUEUE_SIZE = common::CCSDS_HANDLER_QUEUE_SIZE;
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// Action IDs
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static const ActionId_t PRINT_CLCW = 0;
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// Print PDEC monitor register
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static const ActionId_t PRINT_PDEC_MON = 1;
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static const uint8_t STAT_POSITION = 31;
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static const uint8_t FRAME_ANA_POSITION = 28;
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static const uint8_t IREASON_POSITION = 25;
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static const uint8_t NEW_FAR_RECEIVED = 0;
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static const uint32_t FRAME_ANA_MASK = 0x70000000;
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static const uint32_t IREASON_MASK = 0x0E000000;
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static const uint32_t TC_CHANNEL_INACTIVE = 0x0;
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static const uint32_t TC_CHANNEL_ACTIVE = 0x1;
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static const uint32_t TC_CHANNEL_TIMEDOUT = 0x2;
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static const uint32_t TC0_STATUS_MASK = 0x3;
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static const uint32_t TC1_STATUS_MASK = 0xC;
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static const uint32_t TC2_STATUS_MASK = 0x300;
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static const uint32_t TC3_STATUS_MASK = 0xC00;
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static const uint32_t TC4_STATUS_MASK = 0x30000;
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static const uint32_t TC5_STATUS_MASK = 0xc00000;
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// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
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static const uint32_t LOCK_MASK = 0xc00000;
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static const uint32_t TC0_STATUS_POS = 0;
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static const uint32_t TC1_STATUS_POS = 2;
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static const uint32_t TC2_STATUS_POS = 4;
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static const uint32_t TC3_STATUS_POS = 6;
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static const uint32_t TC4_STATUS_POS = 8;
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static const uint32_t TC5_STATUS_POS = 10;
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// Lock register set to 1 when start sequence has been found (CLTU is beeing processed)
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static const uint32_t LOCK_POS = 12;
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/**
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* UIO is 4 byte aligned. Thus offset is calculated with "true offset" / 4
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* Example: PDEC_FAR = 0x2840 => Offset in virtual address space is 0xA10
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*/
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static const uint32_t PDEC_FAR_OFFSET = 0xA10;
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static const uint32_t PDEC_CLCW_OFFSET = 0xA12;
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static const uint32_t PDEC_BFREE_OFFSET = 0xA24;
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static const uint32_t PDEC_BPTR_OFFSET = 0xA25;
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static const uint32_t PDEC_SLEN_OFFSET = 0xA26;
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static const uint32_t PDEC_MON_OFFSET = 0xA27;
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#if BOARD_TE0720 == 1
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static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
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static const int RAM_MAP_SIZE = 0x4000;
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static const int REGISTER_MAP_SIZE = 0x10000;
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#else
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static const int CONFIG_MEMORY_MAP_SIZE = 0x400;
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static const int RAM_MAP_SIZE = 0x4000;
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static const int REGISTER_MAP_SIZE = 0x4000;
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#endif /* BOARD_TE0720 == 1 */
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// 0x200 / 4 = 0x80
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static const uint32_t FRAME_HEADER_OFFSET = 0x80;
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static const size_t MAX_TC_SEGMENT_SIZE = 1017;
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static const uint8_t MAP_ID_MASK = 0x3F;
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#if BOARD_TE0720 == 1
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static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x32000000;
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#else
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static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x26000000;
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#endif
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static const uint32_t MAP_ADDR_LUT_OFFSET = 0xA0;
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static const uint32_t MAP_CLK_FREQ_OFFSET = 0x90;
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static const uint8_t MAX_MAP_ADDR = 63;
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// Writing this to the map address in the look up table will invalidate a MAP ID.
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static const uint8_t NO_DESTINATION = 0;
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static const uint8_t VALID_POSITION = 6;
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static const uint8_t PARITY_POSITION = 7;
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// Expected value stored in FAR register after reset
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static const uint32_t FAR_RESET = 0x7FE0;
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static const uint32_t TC_SEGMENT_LEN = 1017;
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static const uint32_t NO_RF_MASK = 0x8000;
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static const uint32_t NO_BITLOCK_MASK = 0x4000;
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/**
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* TCs with map addresses (also know as Map IDs) assigned to this channel will be stored in
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* the PDEC memory.
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*/
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static const uint8_t PM_BUFFER = 7;
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// MAP clock frequency. Must be a value between 1 and 13 otherwise the TC segment will be
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// discarded
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static const uint8_t MAP_CLK_FREQ = 2;
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enum class FrameAna_t : uint8_t {
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ABANDONED_CLTU,
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FRAME_DIRTY,
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FRAME_ILLEGAL,
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FRAME_ILLEGAL_MULTI_REASON,
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AD_DISCARDED_LOCKOUT,
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AD_DISCARDED_WAIT,
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AD_DISCARDED_NS_VR,
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FRAME_ACCEPTED
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};
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enum class IReason_t : uint8_t {
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NO_REPORT,
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ERROR_VERSION_NUMBER,
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ILLEGAL_COMBINATION,
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INVALID_SC_ID,
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INVALID_VC_ID_LSB,
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INVALID_VC_ID_MSB,
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NS_NOT_ZERO,
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INCORRECT_BC_CC
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};
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enum class State : uint8_t { INIT, RUNNING, WAIT_FOR_RECOVERY };
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/**
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* @brief Reads and handles messages stored in the commandQueue
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*/
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void readCommandQueue(void);
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/**
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* @brief Opens UIO device assigned to AXI to AHB converter giving access to the PDEC
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* registers. The register base address will be mapped into the virtual address space.
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*/
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ReturnValue_t getRegisterAddress();
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/**
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* @brief Opens UIO device assigned to the base address of the PDEC memory space and maps the
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* physical address into the virtual address space.
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*/
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ReturnValue_t getConfigMemoryBaseAddress();
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/**
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* @brief Opens UIO device assigned to the RAM section of the PDEC IP core memory map.
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*
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* @details A received TC segment will be written to this memory area.
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*/
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ReturnValue_t getRamBaseAddress();
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/**
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* @brief This functions writes the configuration parameters to the configuration
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* section of the PDEC.
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*/
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void writePdecConfig();
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/**
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* @brief Reading the FAR resets the set stat flag which signals a new TC. Without clearing
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* this flag no new TC will be excepted. After start up the flag is set and needs
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* to be reset.
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* Stat flag 0 - new TC received
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* Stat flag 1 - old TC (ready to receive next TC)
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*/
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ReturnValue_t resetFarStatFlag();
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/**
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* @brief Releases the PDEC from reset state. PDEC will start with loading the written
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* configuration parameters.
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*/
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ReturnValue_t releasePdec();
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/**
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* @brief Reads the FAR register and checks if a new TC has been received.
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*/
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bool newTcReceived();
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/**
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* @brief Checks if carrier lock or bit lock has been detected and triggers appropriate
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* event.
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*/
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void checkLocks();
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/**
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* @brief Analyzes the FramAna field (frame analysis data) of a FAR report.
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*
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* @return True if frame valid, otherwise false.
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*/
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bool checkFrameAna(uint32_t pdecFar);
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/**
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* @brief This function handles the IReason field of the frame analysis report.
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*
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* @details In case frame as been declared illegal for multiple reasons, the reason with the
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* lowest value will be shown.
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*/
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void handleIReason(uint32_t pdecFar, ReturnValue_t parameter1);
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/**
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* @brief Handles the reception of new TCs. Reads the pointer to the storage location of the
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* new TC segment, extracts the PUS packet and forwards the data to the object
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* responsible for processing the TC.
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*/
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void handleNewTc();
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/**
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* @brief Function reads the last received TC segment from the PDEC memory and copies
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* the data to the tcSegement array.
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*
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* @param tcLength The length of the received TC.
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*
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*/
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ReturnValue_t readTc(uint32_t& tcLength);
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/**
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* @brief Prints the tc segment data
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*/
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void printTC(uint32_t tcLength);
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/**
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* @brief This function calculates the entry for the configuration of the MAP ID routing.
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*
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* @param mapAddr The MAP ID to configure
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* @param moduleId The destination module where all TCs with the map id mapAddr will be routed
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* to.
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*
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* @details The PDEC has different modules where the TCs can be routed to. A lookup table is
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* used which links the MAP ID field to the destination module. The entry for this
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* lookup table is created by this function and must be stored in the configuration
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* memory region of the PDEC. The entry has a specific format
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*/
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uint8_t calcMapAddrEntry(uint8_t moduleId);
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/**
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* @brief This functions calculates the odd parity of the bits in number.
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*
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* @param number The number from which to calculate the odd parity.
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*/
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uint8_t getOddParity(uint8_t number);
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/**
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* brief Returns the 32-bit wide communication link control word (CLCW)
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*/
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uint32_t getClcw();
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/**
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* @brief Returns the PDEC monitor register content
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*
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*/
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uint32_t getPdecMon();
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/**
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* @brief Reads and prints the CLCW. Can be useful for debugging.
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*/
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void printClcw();
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/**
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* @brief Prints monitor register information to debug console.
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*/
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void printPdecMon();
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std::string getMonStatusString(uint32_t status);
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object_id_t tcDestinationId;
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AcceptsTelecommandsIF* tcDestination = nullptr;
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LinuxLibgpioIF* gpioComIF = nullptr;
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/**
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* Reset signal is required to hold PDEC in reset state until the configuration has been
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* written to the appropriate memory space.
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* Can also be used to reboot PDEC in case of erros.
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*/
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gpioId_t pdecReset = gpio::NO_GPIO;
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// UIO device file giving access to the PDEC configuration memory section
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std::string uioConfigMemory;
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// UIO device file giving access to the PDEC RAM section
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std::string uioRamMemory;
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// UIO device file giving access to the PDEC register space
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std::string uioRegisters;
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ActionHelper actionHelper;
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StorageManagerIF* tcStore = nullptr;
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MessageQueueIF* commandQueue = nullptr;
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State state = State::INIT;
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/**
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* Pointer pointing to base address of the PDEC memory space.
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* This address is equivalent with the base address of the section named configuration area in
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* the PDEC datasheet.
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*/
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uint32_t* memoryBaseAddress = nullptr;
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uint32_t* ramBaseAddress = nullptr;
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// Pointer pointing to base address of register space
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uint32_t* registerBaseAddress = nullptr;
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uint32_t pdecFar = 0;
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uint8_t tcSegment[TC_SEGMENT_LEN];
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// Used to check carrier and bit lock changes (default set to no rf and no bitlock)
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uint32_t lastClcw = 0xC000;
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};
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#endif /* LINUX_OBC_PDECHANDLER_H_ */
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