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update events

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Robin Müller 2022-11-16 15:25:20 +01:00
parent a7999bdbb1
commit d5813e1a42
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config/events.csv
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@ -223,6 +223,8 @@ Event ID (dec); Event ID (hex); Name; Severity; Description; File Path
13628;0x353c;SUPV_REPLY_SIZE_MISSMATCH;LOW;;linux/devices/ploc/PlocSupvUartMan.h
13629;0x353d;SUPV_REPLY_CRC_MISSMATCH;LOW;;linux/devices/ploc/PlocSupvUartMan.h
13630;0x353e;SUPV_UPDATE_PROGRESS;INFO;Will be triggered every 5 percent of the update progress. P1: First byte percent, third and fourth byte Sequence Count, P2: Bytes written;linux/devices/ploc/PlocSupvUartMan.h
13631;0x353f;HDLC_FRAME_REMOVAL_ERROR;INFO;;linux/devices/ploc/PlocSupvUartMan.h
13632;0x3540;HDLC_CRC_ERROR;INFO;;linux/devices/ploc/PlocSupvUartMan.h
13700;0x3584;ALLOC_FAILURE;MEDIUM;;bsp_q7s/core/CoreController.h
13701;0x3585;REBOOT_SW;MEDIUM; Software reboot occurred. Can also be a systemd reboot. P1: Current Chip, P2: Current Copy;bsp_q7s/core/CoreController.h
13702;0x3586;REBOOT_MECHANISM_TRIGGERED;MEDIUM;The reboot mechanism was triggered. P1: First 16 bits: Last Chip, Last 16 bits: Last Copy, P2: Each byte is the respective reboot count for the slots;bsp_q7s/core/CoreController.h

1 Event ID (dec) Event ID (hex) Name Severity Description File Path
223 13628 0x353c SUPV_REPLY_SIZE_MISSMATCH LOW linux/devices/ploc/PlocSupvUartMan.h
224 13629 0x353d SUPV_REPLY_CRC_MISSMATCH LOW linux/devices/ploc/PlocSupvUartMan.h
225 13630 0x353e SUPV_UPDATE_PROGRESS INFO Will be triggered every 5 percent of the update progress. P1: First byte percent, third and fourth byte Sequence Count, P2: Bytes written linux/devices/ploc/PlocSupvUartMan.h
226 13631 0x353f HDLC_FRAME_REMOVAL_ERROR INFO linux/devices/ploc/PlocSupvUartMan.h
227 13632 0x3540 HDLC_CRC_ERROR INFO linux/devices/ploc/PlocSupvUartMan.h
228 13700 0x3584 ALLOC_FAILURE MEDIUM bsp_q7s/core/CoreController.h
229 13701 0x3585 REBOOT_SW MEDIUM Software reboot occurred. Can also be a systemd reboot. P1: Current Chip, P2: Current Copy bsp_q7s/core/CoreController.h
230 13702 0x3586 REBOOT_MECHANISM_TRIGGERED MEDIUM The reboot mechanism was triggered. P1: First 16 bits: Last Chip, Last 16 bits: Last Copy, P2: Each byte is the respective reboot count for the slots bsp_q7s/core/CoreController.h