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msp init improvements

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This commit is contained in:
Robin Müller
2021-10-27 18:05:18 +02:00
parent d675621b73
commit cb7399b999
6 changed files with 90 additions and 51 deletions
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22
hal/src/fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp
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@@ -23,17 +23,17 @@ void spiDmaClockEnableWrapper() {
}
void spi::h743zi::standardPollingCfg(MspPollingConfigStruct& cfg) {
cfg.setupMacroWrapper = &spiSetupWrapper;
cfg.cleanUpMacroWrapper = &spiCleanUpWrapper;
cfg.sckPort = GPIOA;
cfg.sckPin = GPIO_PIN_5;
cfg.misoPort = GPIOA;
cfg.misoPin = GPIO_PIN_6;
cfg.mosiPort = GPIOA;
cfg.mosiPin = GPIO_PIN_7;
cfg.sckAlternateFunction = GPIO_AF5_SPI1;
cfg.mosiAlternateFunction = GPIO_AF5_SPI1;
cfg.misoAlternateFunction = GPIO_AF5_SPI1;
cfg.setupCb = &spiSetupWrapper;
cfg.cleanupCb = &spiCleanUpWrapper;
cfg.sck.port = GPIOA;
cfg.sck.pin = GPIO_PIN_5;
cfg.miso.port = GPIOA;
cfg.miso.pin = GPIO_PIN_6;
cfg.mosi.port = GPIOA;
cfg.mosi.pin = GPIO_PIN_7;
cfg.sck.altFnc = GPIO_AF5_SPI1;
cfg.mosi.altFnc = GPIO_AF5_SPI1;
cfg.miso.altFnc = GPIO_AF5_SPI1;
}
void spi::h743zi::standardInterruptCfg(MspIrqConfigStruct& cfg, IrqPriorities spiIrqPrio,