fsfw/hal
Robin Mueller e06c457743
Cache SPI device name in ComIF
- Architecturally, this makes a lot more sense because
  each ComIF should be responsible for one SPI bus
2022-05-11 11:11:39 +02:00
..
src Cache SPI device name in ComIF 2022-05-11 11:11:39 +02:00
CMakeLists.txt GPIO update 2022-03-07 16:07:01 +01:00