275 lines
8.5 KiB
C
275 lines
8.5 KiB
C
#include "hardware_init.h"
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#include "OBSWConfig.h"
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#include "stm32h743xx.h"
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#include "stm32h7xx_hal_rcc_ex.h"
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#include "stm32h7xx_nucleo.h"
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#if OBSW_ADD_LWIP_COMPONENTS == 1
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#include <app_ethernet.h>
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#include "example_common/stm32h7/networking/ethernetif.h"
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#include <lwip/netif.h>
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#include <lwip/init.h>
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#include <lwip/ip_addr.h>
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#include <netif/ethernet.h>
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#endif
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#include <boardconfig.h>
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#include <stdio.h>
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/* Forward declarations */
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void MPU_Config(void);
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void SystemClock_Config(void);
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void BSP_Config(void);
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void CPU_CACHE_Enable(void);
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void MX_USART3_UART_Init(uint32_t baudRate);
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/**
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* ST-LINK UART3
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* CN5 pins on board
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*/
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UART_HandleTypeDef huart3;
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GPIO_InitTypeDef gpio_uart_init_struct;
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#if OBSW_ADD_LWIP_COMPONENTS == 1
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struct netif gnetif;
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#endif
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bool debugAvailable = false;
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void performHardwareInit() {
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/* Configure the MPU attributes as Device memory for ETH DMA descriptors */
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MPU_Config();
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/* Enable the CPU Cache */
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CPU_CACHE_Enable();
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MX_USART3_UART_Init(DEBUG_UART_BAUDRATE);
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HAL_StatusTypeDef retval = HAL_Init();
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if(retval != HAL_OK) {
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printf("Error: HAL initialization failed!\n\r");
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}
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/* Configure the system clock to 400 MHz */
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SystemClock_Config();
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BSP_Config();
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}
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void MX_USART3_UART_Init(uint32_t baudRate)
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{
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__HAL_RCC_USART3_CONFIG(RCC_USART3CLKSOURCE_HSI);
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_USART3_CLK_ENABLE();
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/*Configure GPIO pins : PD8 PD9 */
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gpio_uart_init_struct.Pin = GPIO_PIN_8|GPIO_PIN_9;
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gpio_uart_init_struct.Mode = GPIO_MODE_AF_PP;
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gpio_uart_init_struct.Pull = GPIO_NOPULL;
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gpio_uart_init_struct.Speed = GPIO_SPEED_FREQ_LOW;
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gpio_uart_init_struct.Alternate = GPIO_AF7_USART3;
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HAL_GPIO_Init(GPIOD, &gpio_uart_init_struct);
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int result;
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huart3.Instance = USART3;
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huart3.Init.BaudRate = baudRate;
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huart3.Init.WordLength = UART_WORDLENGTH_8B;
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huart3.Init.StopBits = UART_STOPBITS_1;
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huart3.Init.Parity = UART_PARITY_NONE;
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huart3.Init.Mode = UART_MODE_TX_RX;
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huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart3.Init.OverSampling = UART_OVERSAMPLING_16;
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huart3.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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huart3.Init.ClockPrescaler = UART_PRESCALER_DIV1;
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//huart3.Init.FIFOMode = UART_FIFOMODE_DISABLE;
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//huart3.Init.TXFIFOThreshold = UART_TXFIFO_THRESHOLD_1_8;
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//huart3.Init.RXFIFOThreshold = UART_RXFIFO_THRESHOLD_1_8;
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huart3.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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// we can't do error handling (simple print out first) here because UART3 is our print interface
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result = HAL_UART_Init(&huart3);
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if(result == HAL_OK) {
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//print_uart3("\rUART3 configured successfully !\r\n\0");
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debugAvailable = true;
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}
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}
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/**
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* @brief System Clock Configuration
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* The system Clock is configured as follow :
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* System Clock source = PLL (HSE BYPASS)
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* SYSCLK(Hz) = 400000000 (CPU Clock)
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* HCLK(Hz) = 200000000 (AXI and AHBs Clock)
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* AHB Prescaler = 2
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* D1 APB3 Prescaler = 2 (APB3 Clock 100MHz)
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* D2 APB1 Prescaler = 2 (APB1 Clock 100MHz)
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* D2 APB2 Prescaler = 2 (APB2 Clock 100MHz)
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* D3 APB4 Prescaler = 2 (APB4 Clock 100MHz)
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* HSE Frequency(Hz) = 8000000
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* PLL_M = 4
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* PLL_N = 400
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* PLL_P = 2
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* PLL_Q = 4
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* PLL_R = 2
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* VDD(V) = 3.3
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* Flash Latency(WS) = 4
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* @param None
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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RCC_OscInitTypeDef RCC_OscInitStruct;
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HAL_StatusTypeDef ret = HAL_OK;
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/*!< Supply configuration update enable */
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MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0); // @suppress("Field cannot be resolved")
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/* The voltage scaling allows optimizing the power consumption when the device is
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clocked below the maximum system frequency, to update the voltage scaling value
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regarding system frequency refer to product datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); // @suppress("Field cannot be resolved")
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} // @suppress("Field cannot be resolved")
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/* Enable D2 domain SRAM3 Clock (0x30040000 AXI)*/
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__HAL_RCC_D2SRAM3_CLK_ENABLE(); // @suppress("Field cannot be resolved")
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 4;
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RCC_OscInitStruct.PLL.PLLN = 400;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLQ = 4;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
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if(ret != HAL_OK)
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{
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while(1);
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}
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/* Select PLL as system clock source and configure bus clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
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RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
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RCC_CLOCKTYPE_D3PCLK1);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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if(ret != HAL_OK)
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{
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while(1);
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}
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}
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/*Configure the MPU attributes */
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void MPU_Config(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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/* Disable the MPU */
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HAL_MPU_Disable();
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/* Configure the MPU attributes as Device not cacheable
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for ETH DMA descriptors */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x30040000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_256B;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER0;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Configure the MPU attributes as Cacheable write through
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for LwIP RAM heap which contains the Tx buffers */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x30044000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER1;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enable the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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/*CPU L1-Cache enable*/
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void CPU_CACHE_Enable(void)
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{
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/* Enable I-Cache */
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SCB_EnableICache();
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/* Enable D-Cache */
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SCB_EnableDCache();
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}
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void BSP_Config(void)
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{
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BSP_LED_Init(LED1);
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BSP_LED_Init(LED2);
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BSP_LED_Init(LED3);
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}
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#if OBSW_ADD_LWIP_COMPONENTS == 1
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void Netif_Config(void)
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{
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ip_addr_t ipaddr;
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ip_addr_t netmask;
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ip_addr_t gw;
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#if LWIP_DHCP
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ip_addr_set_zero_ip4(&ipaddr);
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ip_addr_set_zero_ip4(&netmask);
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ip_addr_set_zero_ip4(&gw);
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#else
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/* IP address default setting */
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set_lwip_addresses(&ipaddr, &netmask, &gw);
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#endif
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/* add the network interface */
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struct netif* netif_valid = netif_add(&gnetif, (ip4_addr_t*)&ipaddr,
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(ip4_addr_t*)&netmask, (ip4_addr_t*) &gw, NULL, ðernetif_init,
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ðernet_input);
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if(netif_valid == NULL) {
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printf("Error: netif initialization failed!\n\r");
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return;
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}
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/* Registers the default network interface */
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netif_set_default(&gnetif);
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ethernet_link_status_updated(&gnetif);
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#if LWIP_NETIF_LINK_CALLBACK
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netif_set_link_callback(&gnetif, ethernet_link_status_updated);
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#endif
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}
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#endif /* OBSW_ADD_LWIP_COMPONENTS == 1 */
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