101 lines
3.3 KiB
C++
101 lines
3.3 KiB
C++
#include "GyroL3GD20H.h"
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#include "stm32h7xx_spi_dma_msp.h"
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#include "spiConf.h"
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#include "../spi/spiDefinitions.h"
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#include "fsfw/tasks/TaskFactory.h"
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#include "fsfw/serviceinterface/ServiceInterface.h"
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#include "stm32h7xx_nucleo.h"
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#include "stm32h7xx_hal_spi.h"
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std::array<uint8_t, GyroL3GD20H::recvBufferSize> GyroL3GD20H::rxBuffer;
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TransferStates transferState = TransferStates::IDLE;
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DMA_HandleTypeDef txDmaHandle;
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DMA_HandleTypeDef rxDmaHandle;
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GyroL3GD20H::GyroL3GD20H(SPI_HandleTypeDef *spiHandle): spiHandle(spiHandle) {
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setDmaHandles(&txDmaHandle, &rxDmaHandle);
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}
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ReturnValue_t GyroL3GD20H::initialize() {
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// Configure the SPI peripheral
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spiHandle->Instance = SPI1;
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spiHandle->Init.BaudRatePrescaler = SPI_GetPrescaler(HAL_RCC_GetHCLKFreq(), 3900000);
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spiHandle->Init.Direction = SPI_DIRECTION_2LINES;
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spi::assignSpiMode(spi::SpiModes::MODE_3, spiHandle);
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spiHandle->Init.DataSize = SPI_DATASIZE_8BIT;
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spiHandle->Init.FirstBit = SPI_FIRSTBIT_MSB;
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spiHandle->Init.TIMode = SPI_TIMODE_DISABLE;
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spiHandle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
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spiHandle->Init.CRCPolynomial = 7;
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spiHandle->Init.CRCLength = SPI_CRC_LENGTH_8BIT;
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spiHandle->Init.NSS = SPI_NSS_SOFT;
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spiHandle->Init.NSSPMode = SPI_NSS_PULSE_DISABLE;
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// Recommended setting to avoid glitches
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spiHandle->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;
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spiHandle->Init.Mode = SPI_MODE_MASTER;
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if(HAL_SPI_Init(spiHandle) != HAL_OK) {
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sif::printWarning("Error initializing SPI\n");
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return HasReturnvaluesIF::RETURN_FAILED;
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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ReturnValue_t GyroL3GD20H::performOperation() {
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transferState = TransferStates::WAIT;
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// Start SPI transfer via DMA
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if(HAL_SPI_TransmitReceive_DMA(spiHandle, txBuffer.data(), rxBuffer.data(), 2) != HAL_OK) {
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// Transfer error in transmission process
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sif::printWarning("Error transmitting SPI with DMA\n");
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}
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// Wait for the transfer to complete
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while (transferState == TransferStates::WAIT) {
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TaskFactory::delayTask(1);
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}
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// Invalidate cache prior to access by CPU
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SCB_InvalidateDCache_by_Addr ((uint32_t *)rxBuffer.data(), recvBufferSize);
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switch(transferState) {
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case(TransferStates::SUCCESS): {
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sif::printInfo("Transfer success\n");
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transferState = TransferStates::IDLE;
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break;
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}
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case(TransferStates::FAILURE): {
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sif::printWarning("Transfer failure\n");
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transferState = TransferStates::FAILURE;
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break;
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}
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default: {
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break;
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}
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}
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return HasReturnvaluesIF::RETURN_OK;
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}
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/**
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* @brief TxRx Transfer completed callback.
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* @param hspi: SPI handle
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* @note This example shows a simple way to report end of DMA TxRx transfer, and
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* you can add your own implementation.
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* @retval None
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*/
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void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
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transferState = TransferStates::SUCCESS;
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}
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/**
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* @brief SPI error callbacks.
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* @param hspi: SPI handle
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* @note This example shows a simple way to report transfer error, and you can
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* add your own implementation.
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* @retval None
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*/
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void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) {
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transferState = TransferStates::FAILURE;
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}
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