fsfw/fsfw_example_public
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all modes appear to work well

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This commit is contained in:
Robin Müller
2021-06-10 21:36:29 +02:00
parent cdb7dbff07
commit 5691ba6859
3 changed files with 2 additions and 2 deletions
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48
bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/spiConf.h
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#ifndef FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_
#define FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_
#include "stm32h7xx_nucleo.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* User can use this section to tailor SPIx instance used and associated
resources */
/* Definition for SPIx clock resources */
#define SPIx SPI1
#define SPIx_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE()
#define DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
#define SPIx_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define SPIx_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define SPIx_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define SPIx_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET()
#define SPIx_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET()
/* Definition for SPIx Pins */
#define SPIx_SCK_PIN GPIO_PIN_5
#define SPIx_SCK_GPIO_PORT GPIOA
#define SPIx_SCK_AF GPIO_AF5_SPI1
#define SPIx_MISO_PIN GPIO_PIN_6
#define SPIx_MISO_GPIO_PORT GPIOA
#define SPIx_MISO_AF GPIO_AF5_SPI1
#define SPIx_MOSI_PIN GPIO_PIN_7
#define SPIx_MOSI_GPIO_PORT GPIOA
#define SPIx_MOSI_AF GPIO_AF5_SPI1
/* Definition for SPIx's DMA */
#define SPIx_TX_DMA_STREAM DMA2_Stream3
#define SPIx_RX_DMA_STREAM DMA2_Stream2
#define SPIx_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
#define SPIx_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX
/* Definition for SPIx's NVIC */
#define SPIx_DMA_RX_IRQn DMA2_Stream2_IRQn
#define SPIx_DMA_TX_IRQn DMA2_Stream3_IRQn
#define SPIx_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
#define SPIx_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler
#define SPIx_IRQn SPI1_IRQn
#define SPIx_IRQHandler SPI1_IRQHandler
#endif /* FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_ */