1050 lines
32 KiB
C
1050 lines
32 KiB
C
/**
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******************************************************************************
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* @file stm32h7xx_ll_fmac.h
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* @author MCD Application Team
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* @brief Header file of FMAC LL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7xx_LL_FMAC_H
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#define STM32H7xx_LL_FMAC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx.h"
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/** @addtogroup STM32H7xx_LL_Driver
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* @{
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*/
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#if defined(FMAC)
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/** @defgroup FMAC_LL FMAC
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* @{
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*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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#if defined(USE_FULL_LL_DRIVER)
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/** @defgroup FMAC_LL_Private_Macros FMAC Private Macros
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* @{
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*/
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/**
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* @}
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*/
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#endif /*USE_FULL_LL_DRIVER*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup FMAC_LL_Exported_Constants FMAC Exported Constants
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* @{
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*/
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/** @defgroup FMAC_LL_EC_GET_FLAG Get Flag Defines
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* @brief Flag defines which can be used with LL_FMAC_ReadReg function
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* @{
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*/
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#define LL_FMAC_SR_SAT FMAC_SR_SAT
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#define LL_FMAC_SR_UNFL FMAC_SR_UNFL
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#define LL_FMAC_SR_OVFL FMAC_SR_OVFL
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#define LL_FMAC_SR_X1FULL FMAC_SR_X1FULL
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#define LL_FMAC_SR_YEMPTY FMAC_SR_YEMPTY
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/**
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* @}
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*/
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/** @defgroup FMAC_LL_EC_IT IT Defines
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* @brief IT defines which can be used with LL_FMAC_ReadReg and LL_FMAC_WriteReg functions
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* @{
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*/
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#define LL_FMAC_CR_SATIEN FMAC_CR_SATIEN
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#define LL_FMAC_CR_UNFLIEN FMAC_CR_UNFLIEN
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#define LL_FMAC_CR_OVFLIEN FMAC_CR_OVFLIEN
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#define LL_FMAC_CR_WIEN FMAC_CR_WIEN
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#define LL_FMAC_CR_RIEN FMAC_CR_RIEN
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/**
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* @}
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*/
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/** @defgroup FMAC_LL_EC_WM FMAC watermarks
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* @brief Watermark defines that can be used for buffer full (input) or buffer empty (output)
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* @{
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*/
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#define LL_FMAC_WM_0_THRESHOLD_1 0x00000000UL /*!< Buffer full/empty flag set if there is less than 1 free/unread space. */
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#define LL_FMAC_WM_1_THRESHOLD_2 0x01000000UL /*!< Buffer full/empty flag set if there are less than 2 free/unread spaces. */
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#define LL_FMAC_WM_2_THRESHOLD_4 0x02000000UL /*!< Buffer full/empty flag set if there are less than 4 free/unread spaces. */
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#define LL_FMAC_WM_3_THRESHOLD_8 0x03000000UL /*!< Buffer full/empty flag set if there are less than 8 free/empty spaces. */
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/**
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* @}
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*/
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/** @defgroup FMAC_LL_EC_FUNC FMAC functions
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* @{
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*/
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#define LL_FMAC_FUNC_LOAD_X1 ((uint32_t)(FMAC_PARAM_FUNC_0)) /*!< Load X1 buffer */
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#define LL_FMAC_FUNC_LOAD_X2 ((uint32_t)(FMAC_PARAM_FUNC_1)) /*!< Load X2 buffer */
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#define LL_FMAC_FUNC_LOAD_Y ((uint32_t)(FMAC_PARAM_FUNC_1 | FMAC_PARAM_FUNC_0)) /*!< Load Y buffer */
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#define LL_FMAC_FUNC_CONVO_FIR ((uint32_t)(FMAC_PARAM_FUNC_3)) /*!< Convolution (FIR filter) */
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#define LL_FMAC_FUNC_IIR_DIRECT_FORM_1 ((uint32_t)(FMAC_PARAM_FUNC_3 | FMAC_PARAM_FUNC_0)) /*!< IIR filter (direct form 1) */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup FMAC_LL_Exported_Macros FMAC Exported Macros
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* @{
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*/
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/** @defgroup FMAC_LL_EM_WRITE_READ Common Write and read registers Macros
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* @{
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*/
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/**
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* @brief Write a value in FMAC register
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* @param __INSTANCE__ FMAC Instance
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* @param __REG__ Register to be written
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* @param __VALUE__ Value to be written in the register
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* @retval None
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*/
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#define LL_FMAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
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/**
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* @brief Read a value in FMAC register
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* @param __INSTANCE__ FMAC Instance
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* @param __REG__ Register to be read
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* @retval Register value
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*/
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#define LL_FMAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup FMAC_LL_Exported_Functions FMAC Exported Functions
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* @{
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*/
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/** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
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* @{
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*/
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/**
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* @brief Configure X1 full watermark.
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* @rmtoll X1BUFCFG FULL_WM LL_FMAC_SetX1FullWatermark
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* @param FMACx FMAC instance
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* @param Watermark This parameter can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetX1FullWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
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{
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MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM, Watermark);
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}
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/**
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* @brief Return X1 full watermark.
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* @rmtoll X1BUFCFG FULL_WM LL_FMAC_GetX1FullWatermark
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* @param FMACx FMAC instance
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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*/
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__STATIC_INLINE uint32_t LL_FMAC_GetX1FullWatermark(FMAC_TypeDef *FMACx)
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{
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return (uint32_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM));
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}
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/**
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* @brief Configure X1 buffer size.
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* @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_SetX1BufferSize
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* @param FMACx FMAC instance
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the input buffer (including the optional "headroom").
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetX1BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
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}
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/**
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* @brief Return X1 buffer size.
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* @rmtoll X1BUFCFG X1_BUF_SIZE LL_FMAC_GetX1BufferSize
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* @param FMACx FMAC instance
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* @retval 0x01 .. 0xFF: Number of 16-bit addresses allocated to the input buffer (including the optional "headroom").
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetX1BufferSize(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BUF_SIZE) >> FMAC_X1BUFCFG_X1_BUF_SIZE_Pos);
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}
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/**
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* @brief Configure X1 base.
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* @rmtoll X1BUFCFG X1_BASE LL_FMAC_SetX1Base
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* @param FMACx FMAC instance
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* @param Base 0x00 .. 0xFF: Base address of the input buffer (X1) within the internal memory.
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetX1Base(FMAC_TypeDef *FMACx, uint8_t Base)
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{
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MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE, ((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos);
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}
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/**
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* @brief Return X1 base.
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* @rmtoll X1BUFCFG X1_BASE LL_FMAC_GetX1Base
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* @param FMACx FMAC instance
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* @retval 0x00 .. 0xFF: Base address of the input buffer (X1) within the internal memory.
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetX1Base(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->X1BUFCFG, FMAC_X1BUFCFG_X1_BASE) >> FMAC_X1BUFCFG_X1_BASE_Pos);
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}
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/**
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* @brief Configure X2 buffer size.
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* @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_SetX2BufferSize
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* @param FMACx FMAC instance
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the coefficient buffer.
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetX2BufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
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}
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/**
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* @brief Return X2 buffer size.
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* @rmtoll X2BUFCFG X2_BUF_SIZE LL_FMAC_GetX2BufferSize
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* @param FMACx FMAC instance
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* @retval 0x01 .. 0xFF: Number of 16-bit addresses allocated to the coefficient buffer.
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetX2BufferSize(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BUF_SIZE) >> FMAC_X2BUFCFG_X2_BUF_SIZE_Pos);
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}
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/**
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* @brief Configure X2 base.
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* @rmtoll X2BUFCFG X2_BASE LL_FMAC_SetX2Base
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* @param FMACx FMAC instance
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* @param Base 0x00 .. 0xFF: Base address of the coefficient buffer (X2) within the internal memory.
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetX2Base(FMAC_TypeDef *FMACx, uint8_t Base)
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{
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MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE, ((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos);
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}
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/**
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* @brief Return X2 base.
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* @rmtoll X2BUFCFG X2_BASE LL_FMAC_GetX2Base
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* @param FMACx FMAC instance
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* @retval 0x00 .. 0xFF: Base address of the coefficient buffer (X2) within the internal memory.
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetX2Base(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE) >> FMAC_X2BUFCFG_X2_BASE_Pos);
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}
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/**
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* @brief Configure Y empty watermark.
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* @rmtoll YBUFCFG EMPTY_WM LL_FMAC_SetYEmptyWatermark
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* @param FMACx FMAC instance
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* @param Watermark This parameter can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetYEmptyWatermark(FMAC_TypeDef *FMACx, uint32_t Watermark)
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{
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MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM, Watermark);
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}
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/**
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* @brief Return Y empty watermark.
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* @rmtoll YBUFCFG EMPTY_WM LL_FMAC_GetYEmptyWatermark
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* @param FMACx FMAC instance
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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*/
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__STATIC_INLINE uint32_t LL_FMAC_GetYEmptyWatermark(FMAC_TypeDef *FMACx)
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{
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return (uint32_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM));
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}
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/**
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* @brief Configure Y buffer size.
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* @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_SetYBufferSize
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* @param FMACx FMAC instance
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the output buffer (including the optional "headroom").
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetYBufferSize(FMAC_TypeDef *FMACx, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE, ((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
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}
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/**
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* @brief Return Y buffer size.
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* @rmtoll YBUFCFG Y_BUF_SIZE LL_FMAC_GetYBufferSize
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* @param FMACx FMAC instance
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* @retval 0x01 .. 0xFF: Number of 16-bit addresses allocated to the output buffer (including the optional "headroom").
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetYBufferSize(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BUF_SIZE) >> FMAC_YBUFCFG_Y_BUF_SIZE_Pos);
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}
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/**
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* @brief Configure Y base.
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* @rmtoll YBUFCFG Y_BASE LL_FMAC_SetYBase
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* @param FMACx FMAC instance
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* @param Base 0x00 .. 0xFF: Base address of the output buffer (Y) within the internal memory.
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetYBase(FMAC_TypeDef *FMACx, uint8_t Base)
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{
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MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE, ((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos);
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}
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/**
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* @brief Return Y base.
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* @rmtoll YBUFCFG Y_BASE LL_FMAC_GetYBase
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* @param FMACx FMAC instance
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* @retval 0x00 .. 0xFF: Base address of the output buffer (Y) within the internal memory.
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*/
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__STATIC_INLINE uint8_t LL_FMAC_GetYBase(FMAC_TypeDef *FMACx)
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{
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return (uint8_t)(READ_BIT(FMACx->YBUFCFG, FMAC_YBUFCFG_Y_BASE) >> FMAC_YBUFCFG_Y_BASE_Pos);
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}
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/**
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* @brief Start FMAC processing.
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* @rmtoll PARAM START LL_FMAC_EnableStart
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* @param FMACx FMAC instance
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_EnableStart(FMAC_TypeDef *FMACx)
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{
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SET_BIT(FMACx->PARAM, FMAC_PARAM_START);
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}
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/**
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* @brief Stop FMAC processing.
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* @rmtoll PARAM START LL_FMAC_DisableStart
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* @param FMACx FMAC instance
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_DisableStart(FMAC_TypeDef *FMACx)
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{
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CLEAR_BIT(FMACx->PARAM, FMAC_PARAM_START);
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}
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/**
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* @brief Check the state of FMAC processing.
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* @rmtoll PARAM START LL_FMAC_IsEnabledStart
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* @param FMACx FMAC instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_FMAC_IsEnabledStart(FMAC_TypeDef *FMACx)
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{
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return ((READ_BIT(FMACx->PARAM, FMAC_PARAM_START) == (FMAC_PARAM_START)) ? 1UL : 0UL);
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}
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/**
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* @brief Configure function.
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* @rmtoll PARAM FUNC LL_FMAC_SetFunction
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* @param FMACx FMAC instance
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* @param Function This parameter can be one of the following values:
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* @arg @ref LL_FMAC_FUNC_LOAD_X1
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* @arg @ref LL_FMAC_FUNC_LOAD_X2
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* @arg @ref LL_FMAC_FUNC_LOAD_Y
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* @arg @ref LL_FMAC_FUNC_CONVO_FIR
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* @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetFunction(FMAC_TypeDef *FMACx, uint32_t Function)
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{
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MODIFY_REG(FMACx->PARAM, FMAC_PARAM_FUNC, Function);
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}
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/**
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* @brief Return function.
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* @rmtoll PARAM FUNC LL_FMAC_GetFunction
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* @param FMACx FMAC instance
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_FMAC_FUNC_LOAD_X1
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* @arg @ref LL_FMAC_FUNC_LOAD_X2
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* @arg @ref LL_FMAC_FUNC_LOAD_Y
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* @arg @ref LL_FMAC_FUNC_CONVO_FIR
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* @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
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*/
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__STATIC_INLINE uint32_t LL_FMAC_GetFunction(FMAC_TypeDef *FMACx)
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{
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return (uint32_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_FUNC));
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}
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/**
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* @brief Configure input parameter R.
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* @rmtoll PARAM R LL_FMAC_SetParamR
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* @param FMACx FMAC instance
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* @param Param 0x00 .. 0xFF: Parameter R (gain, etc.).
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_SetParamR(FMAC_TypeDef *FMACx, uint8_t Param)
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|
{
|
|
MODIFY_REG(FMACx->PARAM, FMAC_PARAM_R, ((uint32_t)Param) << FMAC_PARAM_R_Pos);
|
|
}
|
|
|
|
/**
|
|
* @brief Return input parameter R.
|
|
* @rmtoll PARAM R LL_FMAC_GetParamR
|
|
* @param FMACx FMAC instance
|
|
* @retval 0x00 .. 0xFF: Parameter R (gain, etc.).
|
|
*/
|
|
__STATIC_INLINE uint8_t LL_FMAC_GetParamR(FMAC_TypeDef *FMACx)
|
|
{
|
|
return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_R) >> FMAC_PARAM_R_Pos);
|
|
}
|
|
|
|
/**
|
|
* @brief Configure input parameter Q.
|
|
* @rmtoll PARAM Q LL_FMAC_SetParamQ
|
|
* @param FMACx FMAC instance
|
|
* @param Param 0x00 .. 0xFF: Parameter Q (vector length, etc.).
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_SetParamQ(FMAC_TypeDef *FMACx, uint8_t Param)
|
|
{
|
|
MODIFY_REG(FMACx->PARAM, FMAC_PARAM_Q, ((uint32_t)Param) << FMAC_PARAM_Q_Pos);
|
|
}
|
|
|
|
/**
|
|
* @brief Return input parameter Q.
|
|
* @rmtoll PARAM Q LL_FMAC_GetParamQ
|
|
* @param FMACx FMAC instance
|
|
* @retval 0x00 .. 0xFF: Parameter Q (vector length, etc.).
|
|
*/
|
|
__STATIC_INLINE uint8_t LL_FMAC_GetParamQ(FMAC_TypeDef *FMACx)
|
|
{
|
|
return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_Q) >> FMAC_PARAM_Q_Pos);
|
|
}
|
|
|
|
/**
|
|
* @brief Configure input parameter P.
|
|
* @rmtoll PARAM P LL_FMAC_SetParamP
|
|
* @param FMACx FMAC instance
|
|
* @param Param 0x00 .. 0xFF: Parameter P (vector length, number of filter taps, etc.).
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_SetParamP(FMAC_TypeDef *FMACx, uint8_t Param)
|
|
{
|
|
MODIFY_REG(FMACx->PARAM, FMAC_PARAM_P, ((uint32_t)Param) << FMAC_PARAM_P_Pos);
|
|
}
|
|
|
|
/**
|
|
* @brief Return input parameter P.
|
|
* @rmtoll PARAM P LL_FMAC_GetParamP
|
|
* @param FMACx FMAC instance
|
|
* @retval 0x00 .. 0xFF: Parameter P (vector length, number of filter taps, etc.).
|
|
*/
|
|
__STATIC_INLINE uint8_t LL_FMAC_GetParamP(FMAC_TypeDef *FMACx)
|
|
{
|
|
return (uint8_t)(READ_BIT(FMACx->PARAM, FMAC_PARAM_P) >> FMAC_PARAM_P_Pos);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_Reset_Management Reset_Management
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Start the FMAC reset.
|
|
* @rmtoll CR RESET LL_FMAC_EnableReset
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableReset(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_RESET);
|
|
}
|
|
|
|
/**
|
|
* @brief Interrupt the FMAC reset.
|
|
* @rmtoll CR RESET LL_FMAC_DisableReset
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableReset(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_RESET);
|
|
}
|
|
|
|
/**
|
|
* @brief Check the state of the FMAC reset.
|
|
* @rmtoll CR RESET LL_FMAC_IsEnabledReset
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledReset(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_RESET) == (FMAC_CR_RESET)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable Clipping.
|
|
* @rmtoll CR CLIPEN LL_FMAC_EnableClipping
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableClipping(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_CLIPEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable Clipping.
|
|
* @rmtoll CR CLIPEN LL_FMAC_DisableClipping
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableClipping(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_CLIPEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check Clipping State.
|
|
* @rmtoll CR CLIPEN LL_FMAC_IsEnabledClipping
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledClipping(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_CLIPEN) == (FMAC_CR_CLIPEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_DMA_Management DMA_Management
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable FMAC DMA write channel request.
|
|
* @rmtoll CR DMAWEN LL_FMAC_EnableDMAReq_WRITE
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableDMAReq_WRITE(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_DMAWEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC DMA write channel request.
|
|
* @rmtoll CR DMAWEN LL_FMAC_DisableDMAReq_WRITE
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableDMAReq_WRITE(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_DMAWEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC DMA write channel request state.
|
|
* @rmtoll CR DMAWEN LL_FMAC_IsEnabledDMAReq_WRITE
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_WRITE(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_DMAWEN) == (FMAC_CR_DMAWEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable FMAC DMA read channel request.
|
|
* @rmtoll CR DMAREN LL_FMAC_EnableDMAReq_READ
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableDMAReq_READ(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_DMAREN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC DMA read channel request.
|
|
* @rmtoll CR DMAREN LL_FMAC_DisableDMAReq_READ
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableDMAReq_READ(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_DMAREN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC DMA read channel request state.
|
|
* @rmtoll CR DMAREN LL_FMAC_IsEnabledDMAReq_READ
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledDMAReq_READ(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_DMAREN) == (FMAC_CR_DMAREN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_IT_Management IT_Management
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Enable FMAC saturation error interrupt.
|
|
* @rmtoll CR SATIEN LL_FMAC_EnableIT_SAT
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableIT_SAT(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_SATIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC saturation error interrupt.
|
|
* @rmtoll CR SATIEN LL_FMAC_DisableIT_SAT
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableIT_SAT(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_SATIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC saturation error interrupt state.
|
|
* @rmtoll CR SATIEN LL_FMAC_IsEnabledIT_SAT
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_SAT(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_SATIEN) == (FMAC_CR_SATIEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable FMAC underflow error interrupt.
|
|
* @rmtoll CR UNFLIEN LL_FMAC_EnableIT_UNFL
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableIT_UNFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC underflow error interrupt.
|
|
* @rmtoll CR UNFLIEN LL_FMAC_DisableIT_UNFL
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableIT_UNFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_UNFLIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC underflow error interrupt state.
|
|
* @rmtoll CR UNFLIEN LL_FMAC_IsEnabledIT_UNFL
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_UNFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_UNFLIEN) == (FMAC_CR_UNFLIEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable FMAC overflow error interrupt.
|
|
* @rmtoll CR OVFLIEN LL_FMAC_EnableIT_OVFL
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableIT_OVFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC overflow error interrupt.
|
|
* @rmtoll CR OVFLIEN LL_FMAC_DisableIT_OVFL
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableIT_OVFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_OVFLIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC overflow error interrupt state.
|
|
* @rmtoll CR OVFLIEN LL_FMAC_IsEnabledIT_OVFL
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_OVFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_OVFLIEN) == (FMAC_CR_OVFLIEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable FMAC write interrupt.
|
|
* @rmtoll CR WIEN LL_FMAC_EnableIT_WR
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableIT_WR(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_WIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC write interrupt.
|
|
* @rmtoll CR WIEN LL_FMAC_DisableIT_WR
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableIT_WR(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_WIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC write interrupt state.
|
|
* @rmtoll CR WIEN LL_FMAC_IsEnabledIT_WR
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_WR(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_WIEN) == (FMAC_CR_WIEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable FMAC read interrupt.
|
|
* @rmtoll CR RIEN LL_FMAC_EnableIT_RD
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_EnableIT_RD(FMAC_TypeDef *FMACx)
|
|
{
|
|
SET_BIT(FMACx->CR, FMAC_CR_RIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Disable FMAC read interrupt.
|
|
* @rmtoll CR RIEN LL_FMAC_DisableIT_RD
|
|
* @param FMACx FMAC instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_DisableIT_RD(FMAC_TypeDef *FMACx)
|
|
{
|
|
CLEAR_BIT(FMACx->CR, FMAC_CR_RIEN);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC read interrupt state.
|
|
* @rmtoll CR RIEN LL_FMAC_IsEnabledIT_RD
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsEnabledIT_RD(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->CR, FMAC_CR_RIEN) == (FMAC_CR_RIEN)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_FLAG_Management FLAG_Management
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Check FMAC saturation error flag state.
|
|
* @rmtoll SR SAT LL_FMAC_IsActiveFlag_SAT
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_SAT(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->SR, FMAC_SR_SAT) == (FMAC_SR_SAT)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC underflow error flag state.
|
|
* @rmtoll SR UNFL LL_FMAC_IsActiveFlag_UNFL
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_UNFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->SR, FMAC_SR_UNFL) == (FMAC_SR_UNFL)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC overflow error flag state.
|
|
* @rmtoll SR OVFL LL_FMAC_IsActiveFlag_OVFL
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_OVFL(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->SR, FMAC_SR_OVFL) == (FMAC_SR_OVFL)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC X1 buffer full flag state.
|
|
* @rmtoll SR X1FULL LL_FMAC_IsActiveFlag_X1FULL
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_X1FULL(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->SR, FMAC_SR_X1FULL) == (FMAC_SR_X1FULL)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @brief Check FMAC Y buffer empty flag state.
|
|
* @rmtoll SR YEMPTY LL_FMAC_IsActiveFlag_YEMPTY
|
|
* @param FMACx FMAC instance
|
|
* @retval State of bit (1 or 0).
|
|
*/
|
|
__STATIC_INLINE uint32_t LL_FMAC_IsActiveFlag_YEMPTY(FMAC_TypeDef *FMACx)
|
|
{
|
|
return ((READ_BIT(FMACx->SR, FMAC_SR_YEMPTY) == (FMAC_SR_YEMPTY)) ? 1UL : 0UL);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_Data_Management Data_Management
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Write 16-bit input data for the FMAC processing.
|
|
* @rmtoll WDATA WDATA LL_FMAC_WriteData
|
|
* @param FMACx FMAC instance
|
|
* @param InData 0x0000 .. 0xFFFF: 16-bit value to be provided as input data for FMAC processing.
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_WriteData(FMAC_TypeDef *FMACx, uint16_t InData)
|
|
{
|
|
WRITE_REG(FMACx->WDATA, InData);
|
|
}
|
|
|
|
/**
|
|
* @brief Return 16-bit output data of FMAC processing.
|
|
* @rmtoll RDATA RDATA LL_FMAC_ReadData
|
|
* @param FMACx FMAC instance
|
|
* @retval 0x0000 .. 0xFFFF: 16-bit output data of FMAC processing.
|
|
*/
|
|
__STATIC_INLINE uint16_t LL_FMAC_ReadData(FMAC_TypeDef *FMACx)
|
|
{
|
|
return (uint16_t)(READ_REG(FMACx->RDATA));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup FMAC_LL_EF_Configuration FMAC Configuration functions
|
|
* @{
|
|
*/
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/**
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* @brief Configure memory for X1 buffer.
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* @rmtoll X1BUFCFG FULL_WM LL_FMAC_ConfigX1\n
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* X1BUFCFG X1_BASE LL_FMAC_ConfigX1\n
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* X1BUFCFG X1_BUF_SIZE LL_FMAC_ConfigX1
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* @param FMACx FMAC instance
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* @param Watermark This parameter can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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* @param Base 0x00 .. 0xFF: Base address of the input buffer (X1) within the internal memory.
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the input buffer (including the optional "headroom").
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_ConfigX1(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->X1BUFCFG, FMAC_X1BUFCFG_FULL_WM | FMAC_X1BUFCFG_X1_BASE | FMAC_X1BUFCFG_X1_BUF_SIZE,
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Watermark | (((uint32_t)Base) << FMAC_X1BUFCFG_X1_BASE_Pos) | (((uint32_t)BufferSize) << FMAC_X1BUFCFG_X1_BUF_SIZE_Pos));
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}
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/**
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* @brief Configure memory for X2 buffer.
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* @rmtoll X2BUFCFG X2_BASE LL_FMAC_ConfigX2\n
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* X2BUFCFG X2_BUF_SIZE LL_FMAC_ConfigX2
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* @param FMACx FMAC instance
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* @param Base 0x00 .. 0xFF: Base address of the coefficient buffer (X2) within the internal memory.
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the coefficient buffer.
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_ConfigX2(FMAC_TypeDef *FMACx, uint8_t Base, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->X2BUFCFG, FMAC_X2BUFCFG_X2_BASE | FMAC_X2BUFCFG_X2_BUF_SIZE,
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(((uint32_t)Base) << FMAC_X2BUFCFG_X2_BASE_Pos) | (((uint32_t)BufferSize) << FMAC_X2BUFCFG_X2_BUF_SIZE_Pos));
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}
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/**
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* @brief Configure memory for Y buffer.
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* @rmtoll YBUFCFG EMPTY_WM LL_FMAC_ConfigY\n
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* YBUFCFG Y_BASE LL_FMAC_ConfigY\n
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* YBUFCFG Y_BUF_SIZE LL_FMAC_ConfigY
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* @param FMACx FMAC instance
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* @param Watermark This parameter can be one of the following values:
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* @arg @ref LL_FMAC_WM_0_THRESHOLD_1
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* @arg @ref LL_FMAC_WM_1_THRESHOLD_2
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* @arg @ref LL_FMAC_WM_2_THRESHOLD_4
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* @arg @ref LL_FMAC_WM_3_THRESHOLD_8
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* @param Base 0x00 .. 0xFF: Base address of the output buffer (Y) within the internal memory.
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* @param BufferSize 0x01 .. 0xFF: Number of 16-bit addresses allocated to the output buffer (including the optional "headroom").
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* @retval None
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*/
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__STATIC_INLINE void LL_FMAC_ConfigY(FMAC_TypeDef *FMACx, uint32_t Watermark, uint8_t Base, uint8_t BufferSize)
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{
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MODIFY_REG(FMACx->YBUFCFG, FMAC_YBUFCFG_EMPTY_WM | FMAC_YBUFCFG_Y_BASE | FMAC_YBUFCFG_Y_BUF_SIZE,
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Watermark | (((uint32_t)Base) << FMAC_YBUFCFG_Y_BASE_Pos) | (((uint32_t)BufferSize) << FMAC_YBUFCFG_Y_BUF_SIZE_Pos));
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}
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/**
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|
* @brief Configure the FMAC processing.
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|
* @rmtoll PARAM START LL_FMAC_ConfigFunc\n
|
|
* PARAM FUNC LL_FMAC_ConfigFunc\n
|
|
* PARAM P LL_FMAC_ConfigFunc\n
|
|
* PARAM Q LL_FMAC_ConfigFunc\n
|
|
* PARAM R LL_FMAC_ConfigFunc
|
|
* @param FMACx FMAC instance
|
|
* @param Start 0x00 .. 0x01: Enable or disable FMAC processing.
|
|
* @param Function This parameter can be one of the following values:
|
|
* @arg @ref LL_FMAC_FUNC_LOAD_X1
|
|
* @arg @ref LL_FMAC_FUNC_LOAD_X2
|
|
* @arg @ref LL_FMAC_FUNC_LOAD_Y
|
|
* @arg @ref LL_FMAC_FUNC_CONVO_FIR
|
|
* @arg @ref LL_FMAC_FUNC_IIR_DIRECT_FORM_1
|
|
* @param ParamP 0x00 .. 0xFF: Parameter P (vector length, number of filter taps, etc.).
|
|
* @param ParamQ 0x00 .. 0xFF: Parameter Q (vector length, etc.).
|
|
* @param ParamR 0x00 .. 0xFF: Parameter R (gain, etc.).
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void LL_FMAC_ConfigFunc(FMAC_TypeDef *FMACx, uint8_t Start, uint32_t Function, uint8_t ParamP,
|
|
uint8_t ParamQ, uint8_t ParamR)
|
|
{
|
|
MODIFY_REG(FMACx->PARAM, FMAC_PARAM_START | FMAC_PARAM_FUNC | FMAC_PARAM_P | FMAC_PARAM_Q | FMAC_PARAM_R,
|
|
(((uint32_t)Start) << FMAC_PARAM_START_Pos) | Function | (((uint32_t)ParamP) << FMAC_PARAM_P_Pos) | (((uint32_t)ParamQ) << FMAC_PARAM_Q_Pos) | (((uint32_t)ParamR) << FMAC_PARAM_R_Pos));
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
|
|
#if defined(USE_FULL_LL_DRIVER)
|
|
/** @defgroup FMAC_LL_EF_Init Initialization and de-initialization functions
|
|
* @{
|
|
*/
|
|
ErrorStatus LL_FMAC_Init(FMAC_TypeDef *FMACx);
|
|
ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx);
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* USE_FULL_LL_DRIVER */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* defined(FMAC) */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* STM32H7xx_LL_FMAC_H */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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