117 lines
3.3 KiB
C
117 lines
3.3 KiB
C
#include "hardware_init.h"
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#include <OBSWConfig.h>
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#include <lwipopts.h>
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#include <common/stm32_nucleo/networking/ethernetif.h>
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#include <common/stm32_nucleo/networking/app_ethernet.h>
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#include <lwip/init.h>
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#include <lwip/ip_addr.h>
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#include <lwip/netif.h>
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#include <netif/ethernet.h>
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#include <stm32h7xx_nucleo.h>
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#include <bsp/bootcard.h>
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#include <hal.h>
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#include <stdio.h>
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struct netif gnetif;
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void Netif_Config(void);
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void MPU_Config(void);
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void hardware_init() {
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/* Configure MPU for networking */
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MPU_Config();
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BSP_LED_Init(LED1);
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BSP_LED_Init(LED2);
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BSP_LED_Init(LED3);
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#if OBSW_ADD_LWIP_NETWORKING == 1
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/* Initialize the LwIP stack */
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lwip_init();
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/* Configure the Network interface */
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Netif_Config();
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#endif
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}
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void Netif_Config(void) {
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ip_addr_t ipaddr;
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ip_addr_t netmask;
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ip_addr_t gw;
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#if LWIP_DHCP == 1
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ip_addr_set_zero_ip4(&ipaddr);
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ip_addr_set_zero_ip4(&netmask);
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ip_addr_set_zero_ip4(&gw);
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#else
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/* IP address default setting */
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set_lwip_addresses(&ipaddr, &netmask, &gw);
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#endif
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/* add the network interface */
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struct netif* netif_valid = netif_add(&gnetif, (ip4_addr_t*)&ipaddr,
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(ip4_addr_t*)&netmask, (ip4_addr_t*) &gw, NULL, ðernetif_init,
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ðernet_input);
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if(netif_valid == NULL) {
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printf("Error: netif initialization failed!\n\r");
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return;
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}
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/* Registers the default network interface */
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netif_set_default(&gnetif);
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ethernet_link_status_updated(&gnetif);
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#if LWIP_NETIF_LINK_CALLBACK == 1
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netif_set_link_callback(&gnetif, ethernet_link_status_updated);
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#endif
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}
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/* Configure the MPU attributes */
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void MPU_Config(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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/* Disable the MPU */
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HAL_MPU_Disable();
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/* Configure the MPU attributes as Device not cacheable
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for ETH DMA descriptors */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x30040000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_256B;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER0;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Configure the MPU attributes as Cacheable write through
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for LwIP RAM heap which contains the Tx buffers */
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.BaseAddress = 0x30044000;
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MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;
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MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
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MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
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MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
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MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
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MPU_InitStruct.Number = MPU_REGION_NUMBER1;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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/* Enable the MPU */
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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