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bsp_z7/freeRTOS/FreeRTOS_asm_vectors.S
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bsp_z7/freeRTOS/FreeRTOS_asm_vectors.S
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/******************************************************************************
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*
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* (c) Copyright 2009-13 Xilinx, Inc. All rights reserved.
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*
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* This file contains confidential and proprietary information of Xilinx, Inc.
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* and is protected under U.S. and international copyright and other
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* intellectual property laws.
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*
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* DISCLAIMER
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* This disclaimer is not a license and does not grant any rights to the
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* materials distributed herewith. Except as otherwise provided in a valid
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* license issued to you by Xilinx, and to the maximum extent permitted by
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* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
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* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
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* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
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* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
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* and (2) Xilinx shall not be liable (whether in contract or tort, including
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* negligence, or under any other theory of liability) for any loss or damage
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* of any kind or nature related to, arising under or in connection with these
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* materials, including for any direct, or any indirect, special, incidental,
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* or consequential loss or damage (including loss of data, profits, goodwill,
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* or any type of loss or damage suffered as a result of any action brought by
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* a third party) even if such damage or loss was reasonably foreseeable or
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* Xilinx had been advised of the possibility of the same.
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*
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* CRITICAL APPLICATIONS
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* Xilinx products are not designed or intended to be fail-safe, or for use in
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* any application requiring fail-safe performance, such as life-support or
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* safety devices or systems, Class III medical devices, nuclear facilities,
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* applications related to the deployment of airbags, or any other applications
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* that could lead to death, personal injury, or severe property or
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* environmental damage (individually and collectively, "Critical
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* Applications"). Customer assumes the sole risk and liability of any use of
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* Xilinx products in Critical Applications, subject only to applicable laws
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* and regulations governing limitations on product liability.
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*
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* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
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* AT ALL TIMES.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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* @file asm_vectors.s
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*
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* This file contains the initial vector table for the Cortex A9 processor
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ------- -------- ---------------------------------------------------
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* 1.00a ecm/sdm 10/20/09 Initial version
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* 3.05a sdm 02/02/12 Save lr when profiling is enabled
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* 3.10a srt 04/18/13 Implemented ARM Erratas. Please refer to file
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* 'xil_errata.h' for errata description
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* </pre>
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*
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* @note
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*
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* None.
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*
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******************************************************************************/
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#include "xil_errata.h"
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.org 0
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.text
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.arm
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.global _boot
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.global _freertos_vector_table
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.global FIQInterrupt
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.global DataAbortInterrupt
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.global PrefetchAbortInterrupt
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.global vPortInstallFreeRTOSVectorTable
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.extern FreeRTOS_IRQ_Handler
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.extern FreeRTOS_SWI_Handler
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.section .freertos_vectors
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_freertos_vector_table:
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B _boot
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B FreeRTOS_Undefined
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ldr pc, _swi
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B FreeRTOS_PrefetchAbortHandler
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B FreeRTOS_DataAbortHandler
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NOP /* Placeholder for address exception vector*/
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LDR PC, _irq
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B FreeRTOS_FIQHandler
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_irq: .word FreeRTOS_IRQ_Handler
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_swi: .word FreeRTOS_SWI_Handler
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.align 4
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FreeRTOS_FIQHandler: /* FIQ vector handler */
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stmdb sp!,{r0-r3,r12,lr} /* state save from compiled code */
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FIQLoop:
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blx FIQInterrupt /* FIQ vector */
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ldmia sp!,{r0-r3,r12,lr} /* state restore from compiled code */
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subs pc, lr, #4 /* adjust return */
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.align 4
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FreeRTOS_Undefined: /* Undefined handler */
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b .
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.align 4
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FreeRTOS_DataAbortHandler: /* Data Abort handler */
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#ifdef CONFIG_ARM_ERRATA_775420
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dsb
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#endif
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stmdb sp!,{r0-r3,r12,lr} /* state save from compiled code */
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blx DataAbortInterrupt /*DataAbortInterrupt :call C function here */
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ldmia sp!,{r0-r3,r12,lr} /* state restore from compiled code */
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subs pc, lr, #4 /* adjust return */
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.align 4
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FreeRTOS_PrefetchAbortHandler: /* Prefetch Abort handler */
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#ifdef CONFIG_ARM_ERRATA_775420
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dsb
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#endif
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stmdb sp!,{r0-r3,r12,lr} /* state save from compiled code */
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blx PrefetchAbortInterrupt /* PrefetchAbortInterrupt: call C function here */
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ldmia sp!,{r0-r3,r12,lr} /* state restore from compiled code */
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subs pc, lr, #4 /* adjust return */
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.align 4
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.type vPortInstallFreeRTOSVectorTable, %function
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vPortInstallFreeRTOSVectorTable:
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/* Set VBAR to the vector table that contains the FreeRTOS handlers. */
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ldr r0, =_freertos_vector_table
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mcr p15, 0, r0, c12, c0, 0
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dsb
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isb
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bx lr
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.end
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