added freeRTOS on linux build

This commit is contained in:
2024-07-12 16:56:31 +02:00
parent a7336c7f75
commit 976e079d02
16 changed files with 576 additions and 321 deletions

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add_subdirectory(freeRTOS)
add_subdirectory(ps7_cortexa9_0)
add_subdirectory(ps7_cortexa9_0)
target_sources(${TARGET_NAME} PRIVATE main.c)

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# the name of the target operating system
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR armv7a-none-eabihf)
set(CMAKE_C_COMPILER /usr/bin/arm-none-eabi-gcc)
set(CMAKE_CXX_COMPILER /usr/bin/arm-none-eabi-g++)
set(CMAKE_ASM_COMPILER arm-none-eabi-gcc)
set(CMAKE_ASM_COMPILER /usr/bin/arm-none-eabi-gcc)
# built in tests fail
set(CMAKE_C_COMPILER_WORKS 1)

253
bsp_z7/main.c Normal file
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/* Standard includes. */
#include <limits.h>
#include <stdio.h>
/* Scheduler include files. */
#include "FreeRTOS.h"
#include "semphr.h"
#include "task.h"
/* Xilinx includes. */
// #include "platform.h"
#include "xil_exception.h"
#include "xparameters.h"
#include "xscugic.h"
#include "xscutimer.h"
#include "xuartps_hw.h"
/*
* Configure the hardware as necessary to run this demo.
*/
static void prvSetupHardware(void);
/*
* The Xilinx projects use a BSP that do not allow the start up code to be
* altered easily. Therefore the vector table used by FreeRTOS is defined in
* FreeRTOS_asm_vectors.S, which is part of this project. Switch to use the
* FreeRTOS vector table.
*/
extern void vPortInstallFreeRTOSVectorTable(void);
/* Prototypes for the standard FreeRTOS callback/hook functions implemented
within this file. */
void vApplicationMallocFailedHook(void);
void vApplicationIdleHook(void);
void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName);
void vApplicationTickHook(void);
/* The private watchdog is used as the timer that generates run time
stats. This frequency means it will overflow quite quickly. */
XScuWdt xWatchDogInstance;
/*-----------------------------------------------------------*/
/* The interrupt controller is initialised in this file, and made available to
other modules. */
XScuGic xInterruptController;
extern SemaphoreHandle_t malloc_mutex;
/*-----------------------------------------------------------*/
void mission(void);
void initFreeRTOSHelper();
int main(void) {
/* Configure the hardware ready to run the demo. */
prvSetupHardware();
// printf("Booting Software\n");
mission();
}
static void prvSetupHardware(void) {
BaseType_t xStatus;
XScuGic_Config *pxGICConfig;
/* Ensure no interrupts execute while the scheduler is in an inconsistent
state. Interrupts are automatically enabled when the scheduler is
started. */
portDISABLE_INTERRUPTS();
/* Obtain the configuration of the GIC. */
pxGICConfig = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID);
/* Sanity check the FreeRTOSConfig.h settings are correct for the
hardware. */
configASSERT(pxGICConfig);
configASSERT(pxGICConfig->CpuBaseAddress ==
(configINTERRUPT_CONTROLLER_BASE_ADDRESS +
configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET));
configASSERT(pxGICConfig->DistBaseAddress ==
configINTERRUPT_CONTROLLER_BASE_ADDRESS);
/* Install a default handler for each GIC interrupt. */
xStatus = XScuGic_CfgInitialize(&xInterruptController, pxGICConfig,
pxGICConfig->CpuBaseAddress);
configASSERT(xStatus == XST_SUCCESS);
(void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
/* Initialise the LED port. */
// vParTestInitialise();
/* The Xilinx projects use a BSP that do not allow the start up code to be
altered easily. Therefore the vector table used by FreeRTOS is defined in
FreeRTOS_asm_vectors.S, which is part of this project. Switch to use the
FreeRTOS vector table. */
vPortInstallFreeRTOSVectorTable();
/* Initialise UART for use with QEMU. */
// XUartPs_ResetHw(0xE0000000);
// XUartPs_WriteReg(0xE0000000, XUARTPS_CR_OFFSET,
// ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_EN |
// (u32)XUARTPS_CR_STOPBRK));
}
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/
void vInitialiseTimerForRunTimeStats(void) {
XScuWdt_Config *pxWatchDogInstance;
uint32_t ulValue;
const uint32_t ulMaxDivisor = 0xff, ulDivisorShift = 0x08;
pxWatchDogInstance = XScuWdt_LookupConfig(XPAR_SCUWDT_0_DEVICE_ID);
XScuWdt_CfgInitialize(&xWatchDogInstance, pxWatchDogInstance,
pxWatchDogInstance->BaseAddr);
ulValue = XScuWdt_GetControlReg(&xWatchDogInstance);
ulValue |= ulMaxDivisor << ulDivisorShift;
XScuWdt_SetControlReg(&xWatchDogInstance, ulValue);
XScuWdt_LoadWdt(&xWatchDogInstance, UINT_MAX);
XScuWdt_SetTimerMode(&xWatchDogInstance);
XScuWdt_Start(&xWatchDogInstance);
}
/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
used by the Idle task. */
void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer,
StackType_t **ppxIdleTaskStackBuffer,
uint32_t *pulIdleTaskStackSize) {
/* If the buffers to be provided to the Idle task are declared inside this
function then they must be declared static - otherwise they will be allocated
on the stack and so not exists after this function exits. */
static StaticTask_t xIdleTaskTCB;
static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE];
/* Pass out a pointer to the StaticTask_t structure in which the Idle task's
state will be stored. */
*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
/* Pass out the array that will be used as the Idle task's stack. */
*ppxIdleTaskStackBuffer = uxIdleTaskStack;
/* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
Note that, as the array is necessarily of type StackType_t,
configMINIMAL_STACK_SIZE is specified in words, not bytes. */
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
}
/*-----------------------------------------------------------*/
/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
application must provide an implementation of vApplicationGetTimerTaskMemory()
to provide the memory that is used by the Timer service task. */
void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer,
StackType_t **ppxTimerTaskStackBuffer,
uint32_t *pulTimerTaskStackSize);
void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer,
StackType_t **ppxTimerTaskStackBuffer,
uint32_t *pulTimerTaskStackSize) {
/* If the buffers to be provided to the Timer task are declared inside this
function then they must be declared static - otherwise they will be allocated
on the stack and so not exists after this function exits. */
static StaticTask_t xTimerTaskTCB;
static StackType_t uxTimerTaskStack[configTIMER_TASK_STACK_DEPTH];
/* Pass out a pointer to the StaticTask_t structure in which the Timer
task's state will be stored. */
*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
/* Pass out the array that will be used as the Timer task's stack. */
*ppxTimerTaskStackBuffer = uxTimerTaskStack;
/* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
Note that, as the array is necessarily of type StackType_t,
configMINIMAL_STACK_SIZE is specified in words, not bytes. */
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
}
// Marker for debugging sessions
__attribute__((noinline)) void done() { asm(""); }
void vApplicationIdleHook(void) {
volatile size_t xFreeHeapSpace, xMinimumEverFreeHeapSpace;
/* This is just a trivial example of an idle hook. It is called on each
cycle of the idle task. It must *NOT* attempt to block. In this case the
idle task just queries the amount of FreeRTOS heap that remains. See the
memory management section on the http://www.FreeRTOS.org web site for memory
management options. If there is a lot of heap memory free then the
configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
RAM. */
// xFreeHeapSpace = xPortGetFreeHeapSize();
// xMinimumEverFreeHeapSpace = xPortGetMinimumEverFreeHeapSize();
// /* Remove compiler warning about xFreeHeapSpace being set but never used.
// */ (void)xFreeHeapSpace; (void)xMinimumEverFreeHeapSpace;
}
void vApplicationTickHook(void) {
#if (mainSELECTED_APPLICATION == 1)
{
/* The full demo includes a software timer demo/test that requires
prodding periodically from the tick interrupt. */
vTimerPeriodicISRTests();
/* Call the periodic queue overwrite from ISR demo. */
vQueueOverwritePeriodicISRDemo();
/* Call the periodic event group from ISR demo. */
vPeriodicEventGroupsProcessing();
/* Use task notifications from an interrupt. */
xNotifyTaskFromISR();
/* Use mutexes from interrupts. */
vInterruptSemaphorePeriodicTest();
/* Writes to stream buffer byte by byte to test the stream buffer trigger
level functionality. */
vPeriodicStreamBufferProcessing();
/* Writes a string to a string buffer four bytes at a time to demonstrate
a stream being sent from an interrupt to a task. */
vBasicStreamBufferSendFromISR();
#if (configUSE_QUEUE_SETS == 1)
{ vQueueSetAccessQueueSetFromISR(); }
#endif
/* Test flop alignment in interrupts - calling printf from an interrupt
is BAD! */
#if (configASSERT_DEFINED == 1)
{
char cBuf[20];
UBaseType_t uxSavedInterruptStatus;
uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
{ sprintf(cBuf, "%1.3f", 1.234); }
portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedInterruptStatus);
configASSERT(strcmp(cBuf, "1.234") == 0);
}
#endif /* configASSERT_DEFINED */
}
#endif
}

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bsp_z7/testIp.c Normal file
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#include "FreeRTOS.h"
#include "lwip/init.h"
#include "lwip/sio.h"
#include "lwip/timeouts.h"
#include "lwip/udp.h"
#include "queue.h"
#include "task.h"
#include <lwip/ip_addr.h>
#include <lwip/netif.h>
#include <netif/slipif.h>
#include <xscugic.h>
#include <xuartps.h>
#undef XUARTPS_IXR_RXOVR
#define XUARTPS_IXR_RXOVR 0x00000020U /**< Rx Overrun error interrupt */
#define XUARTPS_IXR_RTRIG 0x00000001U /**< RX FIFO trigger interrupt. */
// #include <lwip/apps/tftp_server.h>
// void slipif_rxbyte_input(struct netif *netif, u8_t c);
// uint8_t packets = 0;
// static void *tftp_open(const char *fname, const char *mode, u8_t is_write) {
// LWIP_UNUSED_ARG(mode);
// packets = 100;
// return (void *)13;
// }
// static void tftp_close(void *handle) {}
// static int tftp_read(void *handle, void *buf, int bytes) {
// memset(buf, 'x', bytes);
// if (packets == 0) {
// return 0;
// } else {
// packets--;
// return bytes;
// }
// }
// static int tftp_write(void *handle, struct pbuf *p) { return 0; }
// /* For TFTP client only */
// static void tftp_error(void *handle, int err, const char *msg, int size) {}
// static const struct tftp_context tftp = {tftp_open, tftp_close, tftp_read,
// tftp_write, tftp_error};
struct netif netif;
QueueHandle_t uartIsrQueue;
extern XScuGic xInterruptController; /* Interrupt controller instance */
/** this is based on XUartPs_InterruptHandler() in xuartps_intr.c*/
void handleUARTInt(void *) {
u32 IsrStatus;
/*
* Read the interrupt ID register to determine which
* interrupt is active
*/
IsrStatus = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_IMR_OFFSET);
IsrStatus &= XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET);
// Onlx RX intterupts are enabled
// We do not care which interrupt actually triggered, just get all bytes
// available into the stack
uint8_t RecievedByte;
BaseType_t xHigherPriorityTaskWoken;
while (XUartPs_IsReceiveData(STDIN_BASEADDRESS)) {
RecievedByte = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_FIFO_OFFSET);
xQueueSendToBackFromISR(uartIsrQueue, &RecievedByte,
&xHigherPriorityTaskWoken);
}
/* Clear the interrupt status. */
XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET, IsrStatus);
/* directly yield if sending to the queue woke something in ourselves */
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
}
static struct udp_pcb *udpecho_raw_pcb;
static void
udpecho_raw_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p,
const ip_addr_t *addr, u16_t port)
{
LWIP_UNUSED_ARG(arg);
if (p != NULL) {
/* send received packet back to sender */
udp_sendto(upcb, p, addr, port);
/* free the pbuf */
pbuf_free(p);
}
}
uint8_t data[] = {'1','2','3','4','5'};
void lwip_main(void *) {
struct pbuf* tx = pbuf_alloc_reference(data, sizeof(data), PBUF_REF);
ip_addr_t addr = IPADDR4_INIT_BYTES(10,0,0,13);
udp_sendto(udpecho_raw_pcb, tx, &addr, 1177);
pbuf_free(tx);
while (1) {
// slipif_rxbyte_input() is private, so we use slipif_poll and implement
// sio_tryread()
// sio_tryread() will do a blocking read with a timeout, so we get to check
// the timeouts even if no data is incoming
slipif_poll(&netif);
sys_check_timeouts();
}
}
// TODO define sio_fd_t to an int
uint32_t sio_data;
sio_fd_t sio_open(u8_t devnum) { return &sio_data; }
void sio_send(u8_t c, sio_fd_t fd) { XUartPs_SendByte(STDOUT_BASEADDRESS, c); }
u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len) {
if (len < 1) {
return 0;
}
BaseType_t result;
//need a timeout because lwip task needs to do background work
result = xQueueReceive(uartIsrQueue, data, pdMS_TO_TICKS(250));
if (result == pdTRUE) {
return 1;
} else {
return 0;
}
}
#ifdef LWIP_DEBUG
const char *lwip_strerr(err_t err) { return "Dafuq i know? I am a NOSYS"; }
#endif
u32_t sys_now(void) { return xTaskGetTickCount() * portTICK_PERIOD_MS; }
static StaticQueue_t xStaticQueue;
static const uint16_t QUEUE_LENGTH = 512;
uint8_t ucQueueStorageArea[512 * 1];
static const uint16_t stackSizeWords = 512;
StaticTask_t xTaskBuffer;
StackType_t xStack[512];
// void testIp() {
// uartIsrQueue =
// xQueueCreateStatic(QUEUE_LENGTH, 1, ucQueueStorageArea, &xStaticQueue);
// lwip_init();
// ip4_addr_t slip_addr = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 32))},
// slip_mask = {PP_HTONL(LWIP_MAKEU32(255, 255, 255, 0))},
// slip_gw = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 1))};
// netif_add(&netif, &slip_addr, &slip_mask, &slip_gw, NULL, slipif_init,
// netif_input);
// netif_set_default(&netif);
// // should be done by driver, which does not do it, so we do it here
// netif_set_link_up(&netif);
// netif_set_up(&netif);
// udpecho_raw_pcb = udp_new_ip_type(IPADDR_TYPE_ANY);
// if (udpecho_raw_pcb != NULL) {
// err_t err;
// err = udp_bind(udpecho_raw_pcb, IP_ANY_TYPE, 7);
// if (err == ERR_OK) {
// udp_recv(udpecho_raw_pcb, udpecho_raw_recv, NULL);
// } else {
// /* TODO */
// }
// } else {
// /* TODO */
// }
// /* Install the UART Interrupt handler. */
// BaseType_t xStatus =
// XScuGic_Connect(&xInterruptController, STDIN_INT_NR,
// (Xil_ExceptionHandler)handleUARTInt, NULL);
// configASSERT(xStatus == XST_SUCCESS);
// (void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
// // Set trigger level to 62 of 64 bytes, giving interrupt some time to react
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXWM_OFFSET, 62);
// // Setting the rx timeout to n*4 -1 bits
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXTOUT_OFFSET, 50);
// // enable UART Interrupts
// u32 mask = XUARTPS_IXR_RTRIG | XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL |
// XUARTPS_IXR_TOUT;
// /* Write the mask to the IER Register */
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IER_OFFSET, mask);
// /* Write the inverse of the Mask to the IDR register */
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IDR_OFFSET, (~mask));
// /* Enable the interrupt for the UART1 in the interrupt controller. */
// XScuGic_Enable(&xInterruptController, STDIN_INT_NR);
// // Start lwip task
// xTaskCreateStatic(
// lwip_main, /* The function that implements the task. */
// "lwip", /* The text name assigned to the task - for debug
// only as it is not used by the kernel. */
// stackSizeWords, /* The size of the stack to allocate to the task. */
// NULL, /* The parameter passed to the task - not used in this
// simple case. */
// 4, /* The priority assigned to the task. */
// xStack, &xTaskBuffer);
// }