forked from ROMEO/obsw
added freeRTOS on linux build
This commit is contained in:
@ -1,2 +1,4 @@
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add_subdirectory(freeRTOS)
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add_subdirectory(ps7_cortexa9_0)
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add_subdirectory(ps7_cortexa9_0)
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target_sources(${TARGET_NAME} PRIVATE main.c)
|
@ -1,9 +1,10 @@
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# the name of the target operating system
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set(CMAKE_SYSTEM_NAME Generic)
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set(CMAKE_SYSTEM_PROCESSOR armv7a-none-eabihf)
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set(CMAKE_C_COMPILER /usr/bin/arm-none-eabi-gcc)
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set(CMAKE_CXX_COMPILER /usr/bin/arm-none-eabi-g++)
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set(CMAKE_ASM_COMPILER arm-none-eabi-gcc)
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set(CMAKE_ASM_COMPILER /usr/bin/arm-none-eabi-gcc)
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# built in tests fail
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set(CMAKE_C_COMPILER_WORKS 1)
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|
253
bsp_z7/main.c
Normal file
253
bsp_z7/main.c
Normal file
@ -0,0 +1,253 @@
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/* Standard includes. */
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#include <limits.h>
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#include <stdio.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "semphr.h"
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#include "task.h"
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/* Xilinx includes. */
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// #include "platform.h"
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#include "xil_exception.h"
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#include "xparameters.h"
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#include "xscugic.h"
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#include "xscutimer.h"
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#include "xuartps_hw.h"
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/*
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* Configure the hardware as necessary to run this demo.
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*/
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static void prvSetupHardware(void);
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/*
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* The Xilinx projects use a BSP that do not allow the start up code to be
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* altered easily. Therefore the vector table used by FreeRTOS is defined in
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* FreeRTOS_asm_vectors.S, which is part of this project. Switch to use the
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* FreeRTOS vector table.
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*/
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extern void vPortInstallFreeRTOSVectorTable(void);
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/* Prototypes for the standard FreeRTOS callback/hook functions implemented
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within this file. */
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void vApplicationMallocFailedHook(void);
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void vApplicationIdleHook(void);
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void vApplicationStackOverflowHook(TaskHandle_t pxTask, char *pcTaskName);
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void vApplicationTickHook(void);
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/* The private watchdog is used as the timer that generates run time
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stats. This frequency means it will overflow quite quickly. */
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XScuWdt xWatchDogInstance;
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/*-----------------------------------------------------------*/
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/* The interrupt controller is initialised in this file, and made available to
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other modules. */
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XScuGic xInterruptController;
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extern SemaphoreHandle_t malloc_mutex;
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/*-----------------------------------------------------------*/
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void mission(void);
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void initFreeRTOSHelper();
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int main(void) {
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/* Configure the hardware ready to run the demo. */
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prvSetupHardware();
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// printf("Booting Software\n");
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mission();
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}
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static void prvSetupHardware(void) {
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BaseType_t xStatus;
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XScuGic_Config *pxGICConfig;
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/* Ensure no interrupts execute while the scheduler is in an inconsistent
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state. Interrupts are automatically enabled when the scheduler is
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started. */
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portDISABLE_INTERRUPTS();
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/* Obtain the configuration of the GIC. */
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pxGICConfig = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID);
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/* Sanity check the FreeRTOSConfig.h settings are correct for the
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hardware. */
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configASSERT(pxGICConfig);
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configASSERT(pxGICConfig->CpuBaseAddress ==
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(configINTERRUPT_CONTROLLER_BASE_ADDRESS +
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configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET));
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configASSERT(pxGICConfig->DistBaseAddress ==
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configINTERRUPT_CONTROLLER_BASE_ADDRESS);
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/* Install a default handler for each GIC interrupt. */
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xStatus = XScuGic_CfgInitialize(&xInterruptController, pxGICConfig,
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pxGICConfig->CpuBaseAddress);
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configASSERT(xStatus == XST_SUCCESS);
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(void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
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/* Initialise the LED port. */
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// vParTestInitialise();
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/* The Xilinx projects use a BSP that do not allow the start up code to be
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altered easily. Therefore the vector table used by FreeRTOS is defined in
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FreeRTOS_asm_vectors.S, which is part of this project. Switch to use the
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FreeRTOS vector table. */
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vPortInstallFreeRTOSVectorTable();
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/* Initialise UART for use with QEMU. */
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// XUartPs_ResetHw(0xE0000000);
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// XUartPs_WriteReg(0xE0000000, XUARTPS_CR_OFFSET,
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// ((u32)XUARTPS_CR_RX_DIS | (u32)XUARTPS_CR_TX_EN |
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// (u32)XUARTPS_CR_STOPBRK));
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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void vInitialiseTimerForRunTimeStats(void) {
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XScuWdt_Config *pxWatchDogInstance;
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uint32_t ulValue;
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const uint32_t ulMaxDivisor = 0xff, ulDivisorShift = 0x08;
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pxWatchDogInstance = XScuWdt_LookupConfig(XPAR_SCUWDT_0_DEVICE_ID);
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XScuWdt_CfgInitialize(&xWatchDogInstance, pxWatchDogInstance,
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pxWatchDogInstance->BaseAddr);
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ulValue = XScuWdt_GetControlReg(&xWatchDogInstance);
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ulValue |= ulMaxDivisor << ulDivisorShift;
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XScuWdt_SetControlReg(&xWatchDogInstance, ulValue);
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XScuWdt_LoadWdt(&xWatchDogInstance, UINT_MAX);
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XScuWdt_SetTimerMode(&xWatchDogInstance);
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XScuWdt_Start(&xWatchDogInstance);
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}
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/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
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implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
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used by the Idle task. */
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void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer,
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StackType_t **ppxIdleTaskStackBuffer,
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uint32_t *pulIdleTaskStackSize) {
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/* If the buffers to be provided to the Idle task are declared inside this
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function then they must be declared static - otherwise they will be allocated
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on the stack and so not exists after this function exits. */
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static StaticTask_t xIdleTaskTCB;
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static StackType_t uxIdleTaskStack[configMINIMAL_STACK_SIZE];
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/* Pass out a pointer to the StaticTask_t structure in which the Idle task's
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state will be stored. */
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*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
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/* Pass out the array that will be used as the Idle task's stack. */
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*ppxIdleTaskStackBuffer = uxIdleTaskStack;
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/* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
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Note that, as the array is necessarily of type StackType_t,
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configMINIMAL_STACK_SIZE is specified in words, not bytes. */
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*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
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}
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/*-----------------------------------------------------------*/
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/* configUSE_STATIC_ALLOCATION and configUSE_TIMERS are both set to 1, so the
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application must provide an implementation of vApplicationGetTimerTaskMemory()
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to provide the memory that is used by the Timer service task. */
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void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer,
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StackType_t **ppxTimerTaskStackBuffer,
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uint32_t *pulTimerTaskStackSize);
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void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer,
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StackType_t **ppxTimerTaskStackBuffer,
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uint32_t *pulTimerTaskStackSize) {
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/* If the buffers to be provided to the Timer task are declared inside this
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function then they must be declared static - otherwise they will be allocated
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on the stack and so not exists after this function exits. */
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static StaticTask_t xTimerTaskTCB;
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static StackType_t uxTimerTaskStack[configTIMER_TASK_STACK_DEPTH];
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/* Pass out a pointer to the StaticTask_t structure in which the Timer
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task's state will be stored. */
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*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
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/* Pass out the array that will be used as the Timer task's stack. */
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*ppxTimerTaskStackBuffer = uxTimerTaskStack;
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/* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
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Note that, as the array is necessarily of type StackType_t,
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configMINIMAL_STACK_SIZE is specified in words, not bytes. */
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*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
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}
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// Marker for debugging sessions
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__attribute__((noinline)) void done() { asm(""); }
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void vApplicationIdleHook(void) {
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volatile size_t xFreeHeapSpace, xMinimumEverFreeHeapSpace;
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/* This is just a trivial example of an idle hook. It is called on each
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cycle of the idle task. It must *NOT* attempt to block. In this case the
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idle task just queries the amount of FreeRTOS heap that remains. See the
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memory management section on the http://www.FreeRTOS.org web site for memory
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management options. If there is a lot of heap memory free then the
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configTOTAL_HEAP_SIZE value in FreeRTOSConfig.h can be reduced to free up
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RAM. */
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// xFreeHeapSpace = xPortGetFreeHeapSize();
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// xMinimumEverFreeHeapSpace = xPortGetMinimumEverFreeHeapSize();
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// /* Remove compiler warning about xFreeHeapSpace being set but never used.
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// */ (void)xFreeHeapSpace; (void)xMinimumEverFreeHeapSpace;
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}
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void vApplicationTickHook(void) {
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#if (mainSELECTED_APPLICATION == 1)
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{
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/* The full demo includes a software timer demo/test that requires
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prodding periodically from the tick interrupt. */
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vTimerPeriodicISRTests();
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/* Call the periodic queue overwrite from ISR demo. */
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vQueueOverwritePeriodicISRDemo();
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/* Call the periodic event group from ISR demo. */
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vPeriodicEventGroupsProcessing();
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/* Use task notifications from an interrupt. */
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xNotifyTaskFromISR();
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/* Use mutexes from interrupts. */
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vInterruptSemaphorePeriodicTest();
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/* Writes to stream buffer byte by byte to test the stream buffer trigger
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level functionality. */
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vPeriodicStreamBufferProcessing();
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/* Writes a string to a string buffer four bytes at a time to demonstrate
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a stream being sent from an interrupt to a task. */
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vBasicStreamBufferSendFromISR();
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#if (configUSE_QUEUE_SETS == 1)
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{ vQueueSetAccessQueueSetFromISR(); }
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#endif
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/* Test flop alignment in interrupts - calling printf from an interrupt
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is BAD! */
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#if (configASSERT_DEFINED == 1)
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{
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char cBuf[20];
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UBaseType_t uxSavedInterruptStatus;
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uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
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{ sprintf(cBuf, "%1.3f", 1.234); }
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portCLEAR_INTERRUPT_MASK_FROM_ISR(uxSavedInterruptStatus);
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configASSERT(strcmp(cBuf, "1.234") == 0);
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}
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#endif /* configASSERT_DEFINED */
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}
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#endif
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}
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|
230
bsp_z7/testIp.c
Normal file
230
bsp_z7/testIp.c
Normal file
@ -0,0 +1,230 @@
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#include "FreeRTOS.h"
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#include "lwip/init.h"
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#include "lwip/sio.h"
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#include "lwip/timeouts.h"
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#include "lwip/udp.h"
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#include "queue.h"
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#include "task.h"
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#include <lwip/ip_addr.h>
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#include <lwip/netif.h>
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#include <netif/slipif.h>
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#include <xscugic.h>
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#include <xuartps.h>
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#undef XUARTPS_IXR_RXOVR
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#define XUARTPS_IXR_RXOVR 0x00000020U /**< Rx Overrun error interrupt */
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#define XUARTPS_IXR_RTRIG 0x00000001U /**< RX FIFO trigger interrupt. */
|
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|
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|
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// #include <lwip/apps/tftp_server.h>
|
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|
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// void slipif_rxbyte_input(struct netif *netif, u8_t c);
|
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|
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// uint8_t packets = 0;
|
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|
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// static void *tftp_open(const char *fname, const char *mode, u8_t is_write) {
|
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// LWIP_UNUSED_ARG(mode);
|
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// packets = 100;
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// return (void *)13;
|
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// }
|
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|
||||
// static void tftp_close(void *handle) {}
|
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|
||||
// static int tftp_read(void *handle, void *buf, int bytes) {
|
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// memset(buf, 'x', bytes);
|
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// if (packets == 0) {
|
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// return 0;
|
||||
// } else {
|
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// packets--;
|
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// return bytes;
|
||||
// }
|
||||
// }
|
||||
|
||||
// static int tftp_write(void *handle, struct pbuf *p) { return 0; }
|
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|
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// /* For TFTP client only */
|
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// static void tftp_error(void *handle, int err, const char *msg, int size) {}
|
||||
|
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// static const struct tftp_context tftp = {tftp_open, tftp_close, tftp_read,
|
||||
// tftp_write, tftp_error};
|
||||
|
||||
|
||||
struct netif netif;
|
||||
|
||||
QueueHandle_t uartIsrQueue;
|
||||
|
||||
extern XScuGic xInterruptController; /* Interrupt controller instance */
|
||||
|
||||
/** this is based on XUartPs_InterruptHandler() in xuartps_intr.c*/
|
||||
void handleUARTInt(void *) {
|
||||
u32 IsrStatus;
|
||||
|
||||
/*
|
||||
* Read the interrupt ID register to determine which
|
||||
* interrupt is active
|
||||
*/
|
||||
IsrStatus = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_IMR_OFFSET);
|
||||
|
||||
IsrStatus &= XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET);
|
||||
|
||||
// Onlx RX intterupts are enabled
|
||||
// We do not care which interrupt actually triggered, just get all bytes
|
||||
// available into the stack
|
||||
uint8_t RecievedByte;
|
||||
BaseType_t xHigherPriorityTaskWoken;
|
||||
while (XUartPs_IsReceiveData(STDIN_BASEADDRESS)) {
|
||||
RecievedByte = XUartPs_ReadReg(STDIN_BASEADDRESS, XUARTPS_FIFO_OFFSET);
|
||||
xQueueSendToBackFromISR(uartIsrQueue, &RecievedByte,
|
||||
&xHigherPriorityTaskWoken);
|
||||
}
|
||||
|
||||
/* Clear the interrupt status. */
|
||||
XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_ISR_OFFSET, IsrStatus);
|
||||
|
||||
/* directly yield if sending to the queue woke something in ourselves */
|
||||
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
|
||||
}
|
||||
|
||||
static struct udp_pcb *udpecho_raw_pcb;
|
||||
|
||||
static void
|
||||
udpecho_raw_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p,
|
||||
const ip_addr_t *addr, u16_t port)
|
||||
{
|
||||
LWIP_UNUSED_ARG(arg);
|
||||
if (p != NULL) {
|
||||
/* send received packet back to sender */
|
||||
udp_sendto(upcb, p, addr, port);
|
||||
/* free the pbuf */
|
||||
pbuf_free(p);
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t data[] = {'1','2','3','4','5'};
|
||||
|
||||
void lwip_main(void *) {
|
||||
|
||||
struct pbuf* tx = pbuf_alloc_reference(data, sizeof(data), PBUF_REF);
|
||||
|
||||
ip_addr_t addr = IPADDR4_INIT_BYTES(10,0,0,13);
|
||||
|
||||
udp_sendto(udpecho_raw_pcb, tx, &addr, 1177);
|
||||
|
||||
pbuf_free(tx);
|
||||
|
||||
while (1) {
|
||||
// slipif_rxbyte_input() is private, so we use slipif_poll and implement
|
||||
// sio_tryread()
|
||||
// sio_tryread() will do a blocking read with a timeout, so we get to check
|
||||
// the timeouts even if no data is incoming
|
||||
slipif_poll(&netif);
|
||||
sys_check_timeouts();
|
||||
}
|
||||
}
|
||||
|
||||
// TODO define sio_fd_t to an int
|
||||
uint32_t sio_data;
|
||||
|
||||
sio_fd_t sio_open(u8_t devnum) { return &sio_data; }
|
||||
|
||||
void sio_send(u8_t c, sio_fd_t fd) { XUartPs_SendByte(STDOUT_BASEADDRESS, c); }
|
||||
|
||||
u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len) {
|
||||
if (len < 1) {
|
||||
return 0;
|
||||
}
|
||||
BaseType_t result;
|
||||
//need a timeout because lwip task needs to do background work
|
||||
result = xQueueReceive(uartIsrQueue, data, pdMS_TO_TICKS(250));
|
||||
if (result == pdTRUE) {
|
||||
return 1;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef LWIP_DEBUG
|
||||
const char *lwip_strerr(err_t err) { return "Dafuq i know? I am a NOSYS"; }
|
||||
#endif
|
||||
|
||||
u32_t sys_now(void) { return xTaskGetTickCount() * portTICK_PERIOD_MS; }
|
||||
|
||||
static StaticQueue_t xStaticQueue;
|
||||
static const uint16_t QUEUE_LENGTH = 512;
|
||||
uint8_t ucQueueStorageArea[512 * 1];
|
||||
|
||||
static const uint16_t stackSizeWords = 512;
|
||||
StaticTask_t xTaskBuffer;
|
||||
StackType_t xStack[512];
|
||||
|
||||
// void testIp() {
|
||||
|
||||
// uartIsrQueue =
|
||||
// xQueueCreateStatic(QUEUE_LENGTH, 1, ucQueueStorageArea, &xStaticQueue);
|
||||
|
||||
// lwip_init();
|
||||
|
||||
// ip4_addr_t slip_addr = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 32))},
|
||||
// slip_mask = {PP_HTONL(LWIP_MAKEU32(255, 255, 255, 0))},
|
||||
// slip_gw = {PP_HTONL(LWIP_MAKEU32(10, 0, 0, 1))};
|
||||
|
||||
// netif_add(&netif, &slip_addr, &slip_mask, &slip_gw, NULL, slipif_init,
|
||||
// netif_input);
|
||||
|
||||
// netif_set_default(&netif);
|
||||
// // should be done by driver, which does not do it, so we do it here
|
||||
// netif_set_link_up(&netif);
|
||||
// netif_set_up(&netif);
|
||||
|
||||
// udpecho_raw_pcb = udp_new_ip_type(IPADDR_TYPE_ANY);
|
||||
// if (udpecho_raw_pcb != NULL) {
|
||||
// err_t err;
|
||||
|
||||
// err = udp_bind(udpecho_raw_pcb, IP_ANY_TYPE, 7);
|
||||
// if (err == ERR_OK) {
|
||||
// udp_recv(udpecho_raw_pcb, udpecho_raw_recv, NULL);
|
||||
// } else {
|
||||
// /* TODO */
|
||||
// }
|
||||
// } else {
|
||||
// /* TODO */
|
||||
// }
|
||||
|
||||
// /* Install the UART Interrupt handler. */
|
||||
// BaseType_t xStatus =
|
||||
// XScuGic_Connect(&xInterruptController, STDIN_INT_NR,
|
||||
// (Xil_ExceptionHandler)handleUARTInt, NULL);
|
||||
// configASSERT(xStatus == XST_SUCCESS);
|
||||
// (void)xStatus; /* Remove compiler warning if configASSERT() is not defined. */
|
||||
|
||||
// // Set trigger level to 62 of 64 bytes, giving interrupt some time to react
|
||||
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXWM_OFFSET, 62);
|
||||
|
||||
// // Setting the rx timeout to n*4 -1 bits
|
||||
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_RXTOUT_OFFSET, 50);
|
||||
|
||||
// // enable UART Interrupts
|
||||
// u32 mask = XUARTPS_IXR_RTRIG | XUARTPS_IXR_RXOVR | XUARTPS_IXR_RXFULL |
|
||||
// XUARTPS_IXR_TOUT;
|
||||
// /* Write the mask to the IER Register */
|
||||
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IER_OFFSET, mask);
|
||||
// /* Write the inverse of the Mask to the IDR register */
|
||||
// XUartPs_WriteReg(STDIN_BASEADDRESS, XUARTPS_IDR_OFFSET, (~mask));
|
||||
|
||||
// /* Enable the interrupt for the UART1 in the interrupt controller. */
|
||||
// XScuGic_Enable(&xInterruptController, STDIN_INT_NR);
|
||||
|
||||
// // Start lwip task
|
||||
// xTaskCreateStatic(
|
||||
// lwip_main, /* The function that implements the task. */
|
||||
// "lwip", /* The text name assigned to the task - for debug
|
||||
// only as it is not used by the kernel. */
|
||||
// stackSizeWords, /* The size of the stack to allocate to the task. */
|
||||
// NULL, /* The parameter passed to the task - not used in this
|
||||
// simple case. */
|
||||
// 4, /* The priority assigned to the task. */
|
||||
// xStack, &xTaskBuffer);
|
||||
// }
|
Reference in New Issue
Block a user