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xilinx eth in own folder. found another bug/challenge with dma

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This commit is contained in:
Ulrich Mohr
2024-08-26 12:03:31 +02:00
parent 8497fe754c
commit ee06c79bf4
9 changed files with 163 additions and 233 deletions
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9
bsp_z7/lwip/include/lwipopts.h
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@ -114,7 +114,9 @@
byte alignment -> define MEM_ALIGNMENT to 2. */
/* MSVC port: intel processors don't need 4-byte alignment,
but are faster that way! */
#define MEM_ALIGNMENT 8U
//TODO documentation
//Zynq needs 32 for DMA to work (something about cache I guess...)
#define MEM_ALIGNMENT 32U
#define MEM_USE_POOLS 1
#define MEMP_USE_CUSTOM_POOLS MEM_USE_POOLS
@ -166,6 +168,7 @@ a lot of data that needs to be copied, this should be set high. */
#define PBUF_POOL_SIZE 120
/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
/* Needs to be large enough to fit eth MTU to be able to use DMA for xemacps rx*/
#define PBUF_POOL_BUFSIZE 1600
/** SYS_LIGHTWEIGHT_PROT
@ -177,7 +180,7 @@ a lot of data that needs to be copied, this should be set high. */
/* ---------- TCP options ---------- */
#define LWIP_TCP 1
#define LWIP_TCP 0
#define TCP_TTL 255
#define LWIP_ALTCP (LWIP_TCP)
@ -288,7 +291,7 @@ a lot of data that needs to be copied, this should be set high. */
#endif /* LWIP_STATS */
/* ---------- NETBIOS options ---------- */
#define LWIP_NETBIOS_RESPOND_NAME_QUERY 1
#define LWIP_NETBIOS_RESPOND_NAME_QUERY 0
/* ---------- PPP options ---------- */