forked from ROMEO/obsw
103 lines
5.0 KiB
C
103 lines
5.0 KiB
C
/*
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* Copyright (C) 2018 - 2022 Xilinx, Inc.
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* Copyright (C) 2022 - 2024 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* This file is part of the lwIP TCP/IP stack.
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*
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*/
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#ifndef __XEMAC_IEEE_REGS_H_
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#define __XEMAC_IEEE_REGS_H_
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/* Advertisement control register. */
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#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
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#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
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#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
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#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
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#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
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#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
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#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
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#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
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#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
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#define ADVERTISE_100_AND_10 (ADVERTISE_10FULL | ADVERTISE_100FULL | \
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ADVERTISE_10HALF | ADVERTISE_100HALF)
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#define ADVERTISE_100 (ADVERTISE_100FULL | ADVERTISE_100HALF)
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#define ADVERTISE_10 (ADVERTISE_10FULL | ADVERTISE_10HALF)
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#define ADVERTISE_1000 0x0300
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#define IEEE_CONTROL_REG_OFFSET 0
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#define IEEE_STATUS_REG_OFFSET 1
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#define IEEE_AUTONEGO_ADVERTISE_REG 4
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#define IEEE_PARTNER_ABILITIES_1_REG_OFFSET 5
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#define IEEE_PARTNER_ABILITIES_2_REG_OFFSET 8
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#define IEEE_PARTNER_ABILITIES_3_REG_OFFSET 10
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#define IEEE_1000_ADVERTISE_REG_OFFSET 9
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#define IEEE_MMD_ACCESS_CONTROL_REG 13
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#define IEEE_MMD_ACCESS_ADDRESS_DATA_REG 14
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#define IEEE_COPPER_SPECIFIC_CONTROL_REG 16
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#define IEEE_SPECIFIC_STATUS_REG 17
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#define IEEE_COPPER_SPECIFIC_STATUS_REG_2 19
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#define IEEE_EXT_PHY_SPECIFIC_CONTROL_REG 20
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#define IEEE_CONTROL_REG_MAC 21
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#define IEEE_PAGE_ADDRESS_REGISTER 22
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#define IEEE_CTRL_1GBPS_LINKSPEED_MASK 0x2040
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#define IEEE_CTRL_LINKSPEED_MASK 0x0040
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#define IEEE_CTRL_LINKSPEED_1000M 0x0040
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#define IEEE_CTRL_LINKSPEED_100M 0x2000
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#define IEEE_CTRL_LINKSPEED_10M 0x0000
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#define IEEE_CTRL_FULL_DUPLEX 0x100
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#define IEEE_CTRL_RESET_MASK 0x8000
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#define IEEE_CTRL_AUTONEGOTIATE_ENABLE 0x1000
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#define IEEE_STAT_AUTONEGOTIATE_CAPABLE 0x0008
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#define IEEE_STAT_AUTONEGOTIATE_COMPLETE 0x0020
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#define IEEE_STAT_AUTONEGOTIATE_RESTART 0x0200
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#define IEEE_STAT_LINK_STATUS 0x0004
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#define IEEE_STAT_1GBPS_EXTENSIONS 0x0100
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#define IEEE_AN1_ABILITY_MASK 0x1FE0
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#define IEEE_AN3_ABILITY_MASK_1GBPS 0x0C00
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#define IEEE_AN1_ABILITY_MASK_100MBPS 0x0380
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#define IEEE_AN1_ABILITY_MASK_10MBPS 0x0060
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#define IEEE_RGMII_TXRX_CLOCK_DELAYED_MASK 0x0030
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#define IEEE_SPEED_MASK 0xC000
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#define IEEE_SPEED_1000 0x8000
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#define IEEE_SPEED_100 0x4000
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#define IEEE_ASYMMETRIC_PAUSE_MASK 0x0800
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#define IEEE_PAUSE_MASK 0x0400
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#define IEEE_AUTONEG_ERROR_MASK 0x8000
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#define IEEE_MMD_ACCESS_CTRL_DEVAD_MASK 0x1F
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#define IEEE_MMD_ACCESS_CTRL_PIDEVAD_MASK 0x801F
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#define IEEE_MMD_ACCESS_CTRL_NOPIDEVAD_MASK 0x401F
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#endif /* __XEMAC_IEEE_REGS_H_ */
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