bump crate, improve async driver
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This commit is contained in:
Robin Mueller committed 2026-06-08 21:19:03 +02:00
1 parent abe8083440
commit da95151520
5 files changed
+44 -31

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+8 -1
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@@ -8,6 +8,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
# [unreleased]
# [v0.2.0] 2026-06-08
- TX futures borrow buffer for their lifetime now.
- Constructor is now `unsafe`.
- Async TX write method now returns a future.
# [v0.1.1] 2025-11-28
Minor `Cargo.toml` tweaks
@@ -16,6 +22,7 @@ Minor `Cargo.toml` tweaks
Initial release.
[unreleased]: https://egit.irs.uni-stuttgart.de/rust/axi-uartlite/compare/v0.1.1...HEAD
[unreleased]: https://egit.irs.uni-stuttgart.de/rust/axi-uartlite/compare/v0.2.0...HEAD
[v0.2.0]: https://egit.irs.uni-stuttgart.de/rust/axi-uarglite/compare/v0.1.1...v0.2.0
[v0.1.1]: https://egit.irs.uni-stuttgart.de/rust/axi-uartlite/compare/v0.1.0...v0.1.1
[v0.1.0]: https://egit.irs.uni-stuttgart.de/rust/axi-uartlite/tag/v0.1.0
+4 -5
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@@ -1,8 +1,7 @@
[package]
name = "axi-uartlite"
version = "0.1.1"
version = "0.2.0"
description = "LogiCORE AXI UART Lite v2.0 driver"
author = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
rust-version = "1.85.1"
edition = "2024"
homepage = "https://egit.irs.uni-stuttgart.de/rust/axi-uartlite"
@@ -11,7 +10,7 @@ license = "MIT OR Apache-2.0"
[dependencies]
derive-mmio = "0.6"
bitbybit = "1.4"
bitbybit = "2"
arbitrary-int = "2"
nb = "1"
embedded-hal-nb = "1"
@@ -19,8 +18,8 @@ embedded-io = "0.7"
embedded-io-async = "0.7"
critical-section = "1"
thiserror = { version = "2", default-features = false }
embassy-sync = "0.7"
raw-slicee = "0.1"
embassy-sync = "0.8"
raw-buffer = "0.1"
[features]
default = ["1-waker"]
+1 -1
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@@ -13,7 +13,7 @@ check:
cargo check
embedded:
cargo build --target thumbv7em-none-eabihf
cargo build --target armv7a-none-eabihf
test:
cargo nextest r
+7 -1
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@@ -1,6 +1,12 @@
//! # AXI UART Lite v2.0 driver
//!
//! This is a native Rust driver for the AMD AXI UART Lite v2.0 IP core.
//! This is a native Rust driver for the
//! [AMD AXI UART Lite v2.0 IP core](https://www.amd.com/en/products/adaptive-socs-and-fpgas/intellectual-property/axi_uartlite.html).
//!
//! # Special not on Zynq7000 usage
//!
//! When using this on the Zynq7000 platform, you have to re-configure the interrupt sensitivity
//! in the GIC. An example can be found [here](https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs/src/commit/1ab64050974242e43a7c5a2df5fb09256bc06274/firmware/examples/zedboard/src/bin/uart-non-blocking.rs#L189).
//!
//! # Features
//!
+24 -23
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@@ -15,11 +15,11 @@
//! - `8-wakers`
//! - `16-wakers`
//! - `32-wakers`
use core::{cell::RefCell, convert::Infallible, sync::atomic::AtomicBool};
use core::{cell::RefCell, convert::Infallible, marker::PhantomData, sync::atomic::AtomicBool};
use critical_section::Mutex;
use embassy_sync::waitqueue::AtomicWaker;
use raw_slice::RawBufSlice;
use raw_buffer::RawBufSlice;
use crate::{FIFO_DEPTH, Tx};
@@ -127,23 +127,19 @@ impl TxContext {
}
/// TX future structure.
pub struct TxFuture<'tx> {
pub struct TxFuture<'tx, 'buf> {
waker_idx: usize,
tx: &'tx mut TxAsync,
phantom: core::marker::PhantomData<&'buf ()>,
}
impl<'tx> TxFuture<'tx> {
impl<'tx, 'buf> TxFuture<'tx, 'buf> {
/// Create a new TX future which can be used for asynchronous TX operations.
///
/// # Safety
///
/// This function stores the raw pointer of the passed data slice. The user MUST ensure
/// that the slice outlives the data structure.
pub unsafe fn new(
pub fn new(
tx: &'tx mut TxAsync,
waker_idx: usize,
data: &[u8],
) -> Result<TxFuture<'tx>, InvalidWakerIndex> {
data: &'buf [u8],
) -> Result<Self, InvalidWakerIndex> {
TX_DONE[waker_idx].store(false, core::sync::atomic::Ordering::Relaxed);
tx.tx.reset_fifo();
@@ -160,11 +156,15 @@ impl<'tx> TxFuture<'tx> {
}
context.progress = init_fill_count;
});
Ok(Self { waker_idx, tx })
Ok(Self {
waker_idx,
tx,
phantom: PhantomData,
})
}
}
impl Future for TxFuture<'_> {
impl Future for TxFuture<'_, '_> {
type Output = usize;
fn poll(
@@ -184,7 +184,7 @@ impl Future for TxFuture<'_> {
}
}
impl Drop for TxFuture<'_> {
impl Drop for TxFuture<'_, '_> {
fn drop(&mut self) {
if !TX_DONE[self.waker_idx].load(core::sync::atomic::Ordering::Relaxed) {
critical_section::with(|cs| {
@@ -199,7 +199,7 @@ impl Drop for TxFuture<'_> {
}
}
/// Asynchronous TX structure.
/// Asynchronous TX driver.
pub struct TxAsync {
pub(crate) tx: Tx,
waker_idx: usize,
@@ -207,7 +207,12 @@ pub struct TxAsync {
impl TxAsync {
/// Create a new asynchronous TX structure.
pub fn new(tx: Tx, waker_idx: usize) -> Result<Self, InvalidWakerIndex> {
///
/// # Safety
///
/// The user MUST ensure that the `Drop` method of all futures generated with this driver
/// is called on transfer cancellation. By default, this does not require any special handling.
pub unsafe fn new(tx: Tx, waker_idx: usize) -> Result<Self, InvalidWakerIndex> {
if waker_idx >= NUM_WAKERS {
return Err(InvalidWakerIndex(waker_idx));
}
@@ -218,12 +223,8 @@ impl TxAsync {
///
/// This implementation is not side effect free, and a started future might have already
/// written part of the passed buffer.
pub async fn write(&mut self, buf: &[u8]) -> usize {
if buf.is_empty() {
return 0;
}
let fut = unsafe { TxFuture::new(self, self.waker_idx, buf).unwrap() };
fut.await
pub fn write<'buf>(&mut self, buf: &'buf [u8]) -> TxFuture<'_, 'buf> {
TxFuture::new(self, self.waker_idx, buf).expect("waker index unexpectedly invalid")
}
/// Release the owned TX structure.