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AXI UARTLITE driver
This is a native Rust driver for the AMD AXI UART Lite v2.0 IP core.
Core features
- Basic driver which can be created with a given IP core base address and supports as basic byte-level read and write API.
- Support for
embedded-ioandembedded-io-async
Features
If the asynchronous support for the TX side is used, the number of statically provided wakers can be configured using the following features:
1-wakerwhich is the default2-wakers4-wakers8-wakers16-wakers32-wakers
Description
AMD AXI UARTLITE driver. Moved to https://git.irs.uni-stuttgart.de/irs/hdl-drivers-rs
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