rust/max116xx-10bit
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v0.2.1
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Robin Müller 2021-12-14 14:23:10 +01:00
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4
CHANGELOG.md
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@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased] ## [unreleased]
## [v0.2.1]
- README tweaks
## [v0.2.0] ## [v0.2.0]
### Added ### Added

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Cargo.toml
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@ -1,6 +1,6 @@
[package] [package]
name = "max116xx-10bit" name = "max116xx-10bit"
version = "0.2.0" version = "0.2.1"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"] authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
edition = "2021" edition = "2021"
description = "Driver crate for the MAX116xx 10-bit ADC devices" description = "Driver crate for the MAX116xx 10-bit ADC devices"

15
README.md
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@ -9,13 +9,8 @@ This is a platform agnostic Rust driver for the MAX11618-MAX11621, MAX11624 and
[ADC devices](https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11619.html) [ADC devices](https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11619.html)
which uses the [`embedded-hal`](https://github.com/rust-embedded/embedded-hal) traits. which uses the [`embedded-hal`](https://github.com/rust-embedded/embedded-hal) traits.
This driver implements basic operations to read raw ADC values: This driver supports most required features but the CNVST pin support is still limited because
the test development board did not have the pin connected. Pull requests to improve this are welcome.
- Read ADC values using the SPI clock as an external clock
- Read ADC values using the End-Of-Conversion (EOC) pin
Currently, the driver only supports operation without a wake-up delay and the EOC read
functionality is still limited. Pull requests to improve this are welcome.
# Usage # Usage
@ -25,6 +20,6 @@ the appropriate device.
The crate uses basic type-level support to prevent using the ADC in a wrong way. The crate uses basic type-level support to prevent using the ADC in a wrong way.
The type-level support defaults to an externally clocked device with no wake-up delay. The type-level support defaults to an externally clocked device with no wake-up delay.
This crate was tested using the Vorago REB1 development board. You can find an example application This crate was tested using the Vorago REB1 development board. You can find the example
[here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/src/max11619.rs) application [here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/examples/max11619-adc.rs)
and [here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/examples/max11619-adc.rs). using a [thin abstraction layer](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/src/max11619.rs)