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v0.2.0 ... main

Author SHA1 Message Date
Robin Müller c9b5f6a4e9
add Eq derives
Rust/max116xx-10bit/pipeline/head This commit looks good Details
2022-09-13 10:46:30 +02:00
Robin Müller 3422801850
small clippy improvement
Rust/max116xx-10bit/pipeline/head This commit looks good Details
2022-06-18 22:40:05 +02:00
Robin Müller 8a81b3a721
typo
Rust/max116xx-10bit/pipeline/head This commit looks good Details
2021-12-14 14:36:58 +01:00
Robin Müller 0532c1b94e
v0.2.1
Rust/max116xx-10bit/pipeline/head This commit looks good Details
2021-12-14 14:23:10 +01:00
4 changed files with 21 additions and 22 deletions

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@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased]
## [v0.2.1]
- README tweaks
## [v0.2.0]
### Added

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@ -1,6 +1,6 @@
[package]
name = "max116xx-10bit"
version = "0.2.0"
version = "0.2.1"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
edition = "2021"
description = "Driver crate for the MAX116xx 10-bit ADC devices"

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@ -9,13 +9,8 @@ This is a platform agnostic Rust driver for the MAX11618-MAX11621, MAX11624 and
[ADC devices](https://www.maximintegrated.com/en/products/analog/data-converters/analog-to-digital-converters/MAX11619.html)
which uses the [`embedded-hal`](https://github.com/rust-embedded/embedded-hal) traits.
This driver implements basic operations to read raw ADC values:
- Read ADC values using the SPI clock as an external clock
- Read ADC values using the End-Of-Conversion (EOC) pin
Currently, the driver only supports operation without a wake-up delay and the EOC read
functionality is still limited. Pull requests to improve this are welcome.
This driver supports most required features but the CNVST pin support is still limited because
the test development board did not have the pin connected. Pull requests to improve this are welcome.
# Usage
@ -25,6 +20,6 @@ the appropriate device.
The crate uses basic type-level support to prevent using the ADC in a wrong way.
The type-level support defaults to an externally clocked device with no wake-up delay.
This crate was tested using the Vorago REB1 development board. You can find an example application
[here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/src/max11619.rs)
and [here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/examples/max11619-adc.rs).
This crate was tested using the Vorago REB1 development board. You can find the example
application [here](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/examples/max11619-adc.rs)
using a [thin abstraction layer](https://egit.irs.uni-stuttgart.de/rust/vorago-reb1/src/branch/main/src/max11619.rs)

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@ -4,7 +4,7 @@
//!
//! You can create an initial ADC struct by using the [`Max116xx10Bit::max11618`],
//! [`Max116xx10Bit::max11619`], [`Max116xx10Bit::max11620`], [`Max116xx10Bit::max11621`],
//! [`Max116xx10Bit::max11624`] and [`Max116xx10Bit::max11625`] functionsdepending on which device
//! [`Max116xx10Bit::max11624`] and [`Max116xx10Bit::max11625`] functions depending on which device
//! you are using. This automatically sets the highest channel number accordingly.
//!
//! The default structs use the externally clocked mode with an external voltage reference.
@ -132,7 +132,7 @@ type ExtClkd = ExternallyClocked;
//==================================================================================================
/// Clock modes for the MAX116XX devices
#[derive(Debug, PartialEq, Clone, Copy)]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum ClockMode {
/// Internally timed, CNVST only needs to be pulsed for 40ns.
/// CNVST Configuration: CNVST active low
@ -148,7 +148,7 @@ pub enum ClockMode {
}
/// Voltage reference modes
#[derive(Debug, PartialEq, Clone, Copy)]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum VoltageRefMode {
/// Auto-Shutdown is on, wake-up delay of 65 us
InternalRefWithWakeupDelay = 0b00,
@ -167,7 +167,7 @@ pub enum AveragingConversions {
}
/// Specifies the number of returned result in single scan mode
#[derive(Debug, PartialEq, Clone, Copy)]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum AveragingResults {
FourResults = 0b00,
EightResults = 0b01,
@ -175,7 +175,7 @@ pub enum AveragingResults {
SixteenResults = 0b11,
}
#[derive(Debug, PartialEq, Clone, Copy)]
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
pub enum ScanMode {
Scan0ToChannelN = 0b00,
ScanChannelNToHighest = 0b01,
@ -837,12 +837,12 @@ where
if self.eoc.is_low().map_err(Error::Pin)? {
// maximum length of reply is 32 for 16 channels
let mut dummy_cmd: [u8; 32] = [0; 32];
let num_conv: usize;
if self.base.cfg.pending_scan_mode == Some(ScanMode::ScanChannelNRepeatedly) {
num_conv = self.base.cfg.results_len as usize;
} else {
num_conv = self.base.cfg.requested_conversions;
}
let num_conv: usize =
if self.base.cfg.pending_scan_mode == Some(ScanMode::ScanChannelNRepeatedly) {
self.base.cfg.results_len as usize
} else {
self.base.cfg.requested_conversions
};
self.base.cfg.pending_scan_mode = None;
self.base.cfg.requested_conversions = 0;
self.base.cs.set_low().map_err(Error::Pin)?;