rust/sat-rs
rust/sat-rs
5
1
Fork 0
Code Issues 9 Pull Requests Projects Releases 22 Wiki Activity

but this works??
All checks were successful
Rust/sat-rs/pipeline/head This commit looks good
Details

Browse Source
This commit is contained in:
Robin Müller 2024-05-20 13:43:20 +02:00
parent db3c4e12fc
commit 8ffa3109eb
3 changed files with 7 additions and 65 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

65
embedded-examples/stm32h7-rtic/memory.x
View File

@ -1,63 +1,4 @@
MEMORY
{
/* FLASH and RAM are mandatory memory regions */
/* STM32H742xI/743xI/753xI */
/* STM32H745xI/747xI/755xI/757xI */
/* STM32H7A3xI/7B3xI */
FLASH : ORIGIN = 0x08000000, LENGTH = 2M
/* STM32H742xG/743xG */
/* STM32H745xG/STM32H747xG */
/* STM32H7A3xG */
/* FLASH : ORIGIN = 0x08000000, LENGTH = 512K */
/* FLASH1 : ORIGIN = 0x08100000, LENGTH = 512K */
/* STM32H750xB */
/* STM32H7B0 */
/* FLASH : ORIGIN = 0x08000000, LENGTH = 128K */
/* DTCM */
RAM : ORIGIN = 0x20000000, LENGTH = 128K
/* AXISRAM */
AXISRAM : ORIGIN = 0x24000000, LENGTH = 512K
/* SRAM */
SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K
SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
/* Backup SRAM */
BSRAM : ORIGIN = 0x38800000, LENGTH = 4K
/* Instruction TCM */
ITCM : ORIGIN = 0x00000000, LENGTH = 64K
MEMORY {
FLASH : ORIGIN = 0x08000000, LENGTH = 512K
RAM : ORIGIN = 0x20000000, LENGTH = 64K
}
/* The location of the stack can be overridden using the
`_stack_start` symbol. Place the stack at the end of RAM */
_stack_start = ORIGIN(RAM) + LENGTH(RAM);
/* The location of the .text section can be overridden using the
`_stext` symbol. By default it will place after .vector_table */
/* _stext = ORIGIN(FLASH) + 0x40c; */
/* These sections are used for some of the examples */
SECTIONS {
.axisram (NOLOAD) : ALIGN(8) {
*(.axisram .axisram.*);
. = ALIGN(8);
} > AXISRAM
/* The SRAM1 and SRAM2 section are commonly used as the stack and heap for the
CM4 core in dualcore versions and should thus not be used in examples*/
.sram3 (NOLOAD) : ALIGN(4) {
*(.sram3 .sram3.*);
. = ALIGN(4);
} > SRAM3
.sram4 (NOLOAD) : ALIGN(4) {
*(.sram4 .sram4.*);
. = ALIGN(4);
} > SRAM4
};

4
embedded-examples/stm32h7-rtic/src/bin/blinky.rs
View File

@ -13,6 +13,8 @@ use cortex_m_rt::entry;
#[entry]
fn main() -> ! {
defmt::println!("starting stm32h7 blinky example");
// Get access to the device specific peripherals from the peripheral access crate
let dp = stm32h7xx_hal::stm32::Peripherals::take().unwrap();
@ -43,8 +45,6 @@ fn main() -> ! {
let mut timer = Timer::tim1(dp.TIM1, ccdr.peripheral.TIM1, &ccdr.clocks);
timer.start(1.Hz());
defmt::info!("starting stm32h7 blinky example");
// Wait for the timer to trigger an update and change the state of the LED
loop {
ld1.toggle();

3
embedded-examples/stm32h7-rtic/src/main.rs
View File

@ -31,6 +31,8 @@ mod app {
#[init]
fn init(cx: init::Context) -> (Shared, Local) {
defmt::println!("Starting sat-rs demo application for the STM32H743ZIT");
let pwr = cx.device.PWR.constrain();
let pwrcfg = pwr.freeze();
@ -55,7 +57,6 @@ mod app {
ccdr.clocks.sys_ck().to_Hz(),
systick_mono_token,
);
defmt::info!("Starting sat-rs demo application for the STM32H743ZIT");
let gpiob = cx.device.GPIOB.split(ccdr.peripheral.GPIOB);
let led0 = gpiob.pb0.into_push_pull_output();