975cd927f4
Merge branch 'main' into add-timestamp-to-sim-request
Rust/sat-rs/pipeline/pr-main This commit looks good
2024-04-09 17:27:57 +02:00
df2733a176
Major refactoring and update of PUS module
2024-04-04 15:18:53 +02:00
9039c1b59a
Merge branch 'main' into add-timestamp-to-sim-request
Rust/sat-rs/pipeline/pr-main This commit looks good
2024-03-25 16:14:04 +01:00
d27a41e4de
Start updating the STM32F3 Discovery example
Rust/sat-rs/pipeline/head This commit looks good
2024-03-22 13:08:01 +01:00
9d711d2b73
add fern logging
Rust/sat-rs/pipeline/head There was a failure building this commit
2024-03-13 10:49:24 +01:00
ae8e39f626
First version of asynchronix based mini simulator
...
Rust/sat-rs/pipeline/pr-main Build queued...
- Basic simulator with 3 devices
- Can be driven via a UDP interface
- Design allows to drive the simulation via different interface in the future
by using Request/Reply messaging.
2024-03-09 15:11:11 +01:00
9e314a8376
ignore Cargo.lock
2023-01-25 21:41:33 +01:00
c9313c1bce
update .gitignore and add clion run config
2022-05-14 20:49:26 +02:00
4eb103508c
init repo
2022-05-14 20:44:44 +02:00
