Robin Mueller
d27a41e4de
All checks were successful
Rust/sat-rs/pipeline/head This commit looks good
43 lines
1.2 KiB
Plaintext
43 lines
1.2 KiB
Plaintext
target extended-remote :3333
|
|
|
|
# print demangled symbols
|
|
set print asm-demangle on
|
|
|
|
# set backtrace limit to not have infinite backtrace loops
|
|
set backtrace limit 32
|
|
|
|
# detect unhandled exceptions, hard faults and panics
|
|
break DefaultHandler
|
|
break HardFault
|
|
break rust_begin_unwind
|
|
# # run the next few lines so the panic message is printed immediately
|
|
# # the number needs to be adjusted for your panic handler
|
|
# commands $bpnum
|
|
# next 4
|
|
# end
|
|
|
|
# *try* to stop at the user entry point (it might be gone due to inlining)
|
|
break main
|
|
|
|
# monitor arm semihosting enable
|
|
|
|
# # send captured ITM to the file itm.fifo
|
|
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
|
|
# # 8000000 must match the core clock frequency
|
|
# # 2000000 is the frequency of the SWO pin. This was added for newer
|
|
# openocd versions like v0.12.0.
|
|
monitor tpiu config internal itm.txt uart off 8000000 2000000
|
|
|
|
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
|
|
# # 8000000 must match the core clock frequency
|
|
# # 2000000 is the frequency of the SWO pin
|
|
# monitor tpiu config external uart off 8000000 2000000
|
|
|
|
# # enable ITM port 0
|
|
monitor itm port 0 on
|
|
|
|
load
|
|
|
|
# start the process but immediately halt the processor
|
|
stepi
|