Robin Mueller
f1a1cd6054
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Rust/sat-rs/pipeline/head This commit looks good
64 lines
1.8 KiB
Plaintext
64 lines
1.8 KiB
Plaintext
MEMORY
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{
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/* FLASH and RAM are mandatory memory regions */
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/* STM32H742xI/743xI/753xI */
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/* STM32H745xI/747xI/755xI/757xI */
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/* STM32H7A3xI/7B3xI */
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FLASH : ORIGIN = 0x08000000, LENGTH = 2M
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/* STM32H742xG/743xG */
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/* STM32H745xG/STM32H747xG */
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/* STM32H7A3xG */
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/* FLASH : ORIGIN = 0x08000000, LENGTH = 512K */
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/* FLASH1 : ORIGIN = 0x08100000, LENGTH = 512K */
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/* STM32H750xB */
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/* STM32H7B0 */
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/* FLASH : ORIGIN = 0x08000000, LENGTH = 128K */
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/* DTCM */
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RAM : ORIGIN = 0x20000000, LENGTH = 128K
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/* AXISRAM */
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AXISRAM : ORIGIN = 0x24000000, LENGTH = 512K
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/* SRAM */
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SRAM1 : ORIGIN = 0x30000000, LENGTH = 128K
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SRAM2 : ORIGIN = 0x30020000, LENGTH = 128K
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SRAM3 : ORIGIN = 0x30040000, LENGTH = 32K
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SRAM4 : ORIGIN = 0x38000000, LENGTH = 64K
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/* Backup SRAM */
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BSRAM : ORIGIN = 0x38800000, LENGTH = 4K
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/* Instruction TCM */
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ITCM : ORIGIN = 0x00000000, LENGTH = 64K
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}
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/* The location of the stack can be overridden using the
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`_stack_start` symbol. Place the stack at the end of RAM */
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_stack_start = ORIGIN(RAM) + LENGTH(RAM);
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/* The location of the .text section can be overridden using the
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`_stext` symbol. By default it will place after .vector_table */
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/* _stext = ORIGIN(FLASH) + 0x40c; */
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/* These sections are used for some of the examples */
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SECTIONS {
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.axisram (NOLOAD) : ALIGN(8) {
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*(.axisram .axisram.*);
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. = ALIGN(8);
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} > AXISRAM
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/* The SRAM1 and SRAM2 section are commonly used as the stack and heap for the
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CM4 core in dualcore versions and should thus not be used in examples*/
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.sram3 (NOLOAD) : ALIGN(4) {
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*(.sram3 .sram3.*);
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. = ALIGN(4);
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} > SRAM3
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.sram4 (NOLOAD) : ALIGN(4) {
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*(.sram4 .sram4.*);
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. = ALIGN(4);
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} > SRAM4
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};
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