Merge pull request 'Replaced Hertz by impl Into<Hertz> completely' (#2) from mueller/impl-into-hertz into main
Rust/va108xx-hal/pipeline/head This commit looks good Details

Reviewed-on: #2
This commit is contained in:
Robin Müller 2021-12-09 23:28:58 +01:00
commit 1db363fe1a
7 changed files with 27 additions and 22 deletions

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@ -6,6 +6,15 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](http://keepachangelog.com/) The format is based on [Keep a Changelog](http://keepachangelog.com/)
and this project adheres to [Semantic Versioning](http://semver.org/). and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased]
## [v0.4.0]
### Changed
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
`+ Copy` where not necessary
## [v0.3.1] ## [v0.3.1]
- Updated all links to point to new repository - Updated all links to point to new repository

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@ -1,6 +1,6 @@
[package] [package]
name = "va108xx-hal" name = "va108xx-hal"
version = "0.3.1" version = "0.4.0"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"] authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
edition = "2021" edition = "2021"
description = "HAL for the Vorago VA108xx family of microcontrollers" description = "HAL for the Vorago VA108xx family of microcontrollers"

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@ -114,12 +114,8 @@ fn main() -> ! {
match SPI_BUS_SEL { match SPI_BUS_SEL {
SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => { SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
if let Some(ref mut spi) = *spia_ref.borrow_mut() { if let Some(ref mut spi) = *spia_ref.borrow_mut() {
let transfer_cfg = TransferConfig::new_no_hw_cs( let transfer_cfg =
SPI_SPEED_KHZ.khz().into(), TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false);
SPI_MODE,
BLOCKMODE,
false,
);
spi.cfg_transfer(&transfer_cfg); spi.cfg_transfer(&transfer_cfg);
} }
} }
@ -127,7 +123,7 @@ fn main() -> ! {
if let Some(ref mut spi) = *spib_ref.borrow_mut() { if let Some(ref mut spi) = *spib_ref.borrow_mut() {
let hw_cs_pin = pinsb.pb2.into_funsel_1(); let hw_cs_pin = pinsb.pb2.into_funsel_1();
let transfer_cfg = TransferConfig::new( let transfer_cfg = TransferConfig::new(
SPI_SPEED_KHZ.khz().into(), SPI_SPEED_KHZ.khz(),
SPI_MODE, SPI_MODE,
Some(hw_cs_pin), Some(hw_cs_pin),
BLOCKMODE, BLOCKMODE,

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@ -25,7 +25,7 @@ fn main() -> ! {
(tx, rx), (tx, rx),
115200.bps(), 115200.bps(),
&mut dp.SYSCONFIG, &mut dp.SYSCONFIG,
50.mhz().into(), 50.mhz(),
); );
let (mut tx, mut rx) = uartb.split(); let (mut tx, mut rx) = uartb.split();
writeln!(tx, "Hello World\r").unwrap(); writeln!(tx, "Hello World\r").unwrap();

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@ -231,7 +231,7 @@ macro_rules! i2c_base {
impl I2cBase<$I2CX> { impl I2cBase<$I2CX> {
pub fn $i2cx( pub fn $i2cx(
i2c: $I2CX, i2c: $I2CX,
sys_clk: impl Into<Hertz> + Copy, sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
ms_cfg: Option<&MasterConfig>, ms_cfg: Option<&MasterConfig>,
sl_cfg: Option<&SlaveConfig>, sl_cfg: Option<&SlaveConfig>,
@ -740,7 +740,7 @@ macro_rules! i2c_slave {
fn $i2cx_slave( fn $i2cx_slave(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy, sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Self { ) -> Self {
@ -897,7 +897,7 @@ macro_rules! i2c_slave {
pub fn i2ca( pub fn i2ca(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy, sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
@ -912,7 +912,7 @@ macro_rules! i2c_slave {
pub fn $i2cx( pub fn $i2cx(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz> + Copy, sys_clk: impl Into<Hertz>,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Self { ) -> Self {

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@ -218,9 +218,9 @@ pub struct ReducedTransferConfig {
} }
impl TransferConfig<NoneT> { impl TransferConfig<NoneT> {
pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self { pub fn new_no_hw_cs(spi_clk: impl Into<Hertz>, mode: Mode, blockmode: bool, sod: bool) -> Self {
TransferConfig { TransferConfig {
spi_clk, spi_clk: spi_clk.into(),
mode, mode,
hw_cs: None, hw_cs: None,
sod, sod,
@ -231,14 +231,14 @@ impl TransferConfig<NoneT> {
impl<HWCS: HwCs> TransferConfig<HWCS> { impl<HWCS: HwCs> TransferConfig<HWCS> {
pub fn new( pub fn new(
spi_clk: Hertz, spi_clk: impl Into<Hertz>,
mode: Mode, mode: Mode,
hw_cs: Option<HWCS>, hw_cs: Option<HWCS>,
blockmode: bool, blockmode: bool,
sod: bool, sod: bool,
) -> Self { ) -> Self {
TransferConfig { TransferConfig {
spi_clk, spi_clk: spi_clk.into(),
mode, mode,
hw_cs, hw_cs,
sod, sod,
@ -452,7 +452,7 @@ macro_rules! spi {
} }
#[inline] #[inline]
pub fn cfg_clock(&mut self, spi_clk: Hertz) { pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
self.spi_base.cfg_clock(spi_clk); self.spi_base.cfg_clock(spi_clk);
} }
@ -482,8 +482,8 @@ macro_rules! spi {
impl<WORD: Word> SpiBase<$SPIX, WORD> { impl<WORD: Word> SpiBase<$SPIX, WORD> {
#[inline] #[inline]
pub fn cfg_clock(&mut self, spi_clk: Hertz) { pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1)); let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1));
self.spi self.spi
.clkprescale .clkprescale
.write(|w| unsafe { w.bits(clk_prescale) }); .write(|w| unsafe { w.bits(clk_prescale) });

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@ -306,12 +306,12 @@ macro_rules! uart_impl {
pins: PINS, pins: PINS,
config: impl Into<Config>, config: impl Into<Config>,
syscfg: &mut SYSCONFIG, syscfg: &mut SYSCONFIG,
sys_clk: Hertz sys_clk: impl Into<Hertz>
) -> Self ) -> Self
{ {
enable_peripheral_clock(syscfg, $clk_enb_enum); enable_peripheral_clock(syscfg, $clk_enb_enum);
Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init( Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
config.into(), sys_clk config.into(), sys_clk.into()
) )
} }
} }